serial: mxs-auart: use mctrl_gpio helpers for handling modem signals
Dedicated CTS and RTS pins are unusable together with a lot of other peripherals because they share the same line. Pinctrl is limited. Moreover, the AUART controller doesn't handle DTR/DSR/DCD/RI signals, so we have to control them via GPIO. This patch permits to use GPIOs to control the CTS/RTS/DTR/DSR/DCD/RI signals. Signed-off-by: Janusz Uzycki <j.uzycki@elproma.com.pl> Reviewed-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -11,8 +11,13 @@ Required properties:
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- dma-names: "rx" for RX channel, "tx" for TX channel.
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Optional properties:
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- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines,
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- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines
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for hardware flow control,
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it also means you enable the DMA support for this UART.
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- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
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line respectively. It will use specified PIO instead of the peripheral
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function pin for the USART feature.
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If unsure, don't specify this property.
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Example:
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auart0: serial@8006a000 {
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@ -21,6 +26,9 @@ auart0: serial@8006a000 {
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interrupts = <112>;
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dmas = <&dma_apbx 8>, <&dma_apbx 9>;
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dma-names = "rx", "tx";
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cts-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
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dsr-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
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dcd-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
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};
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Note: Each auart port should have an alias correctly numbered in "aliases"
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@ -1408,6 +1408,7 @@ config SERIAL_MXS_AUART
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depends on ARCH_MXS
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tristate "MXS AUART support"
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select SERIAL_CORE
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select SERIAL_MCTRL_GPIO if GPIOLIB
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help
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This driver supports the MXS Application UART (AUART) port.
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@ -42,6 +42,9 @@
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#include <asm/cacheflush.h>
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#include <linux/err.h>
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#include "serial_mctrl_gpio.h"
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#define MXS_AUART_PORTS 5
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#define MXS_AUART_FIFO_SIZE 16
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@ -158,6 +161,8 @@ struct mxs_auart_port {
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struct scatterlist rx_sgl;
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struct dma_chan *rx_dma_chan;
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void *rx_dma_buf;
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struct mctrl_gpios *gpios;
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};
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static struct platform_device_id mxs_auart_devtype[] = {
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@ -405,6 +410,8 @@ static void mxs_auart_release_port(struct uart_port *u)
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static void mxs_auart_set_mctrl(struct uart_port *u, unsigned mctrl)
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{
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struct mxs_auart_port *s = to_auart_port(u);
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u32 ctrl = readl(u->membase + AUART_CTRL2);
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ctrl &= ~(AUART_CTRL2_RTSEN | AUART_CTRL2_RTS);
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@ -416,17 +423,20 @@ static void mxs_auart_set_mctrl(struct uart_port *u, unsigned mctrl)
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}
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writel(ctrl, u->membase + AUART_CTRL2);
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mctrl_gpio_set(s->gpios, mctrl);
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}
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static u32 mxs_auart_get_mctrl(struct uart_port *u)
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{
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struct mxs_auart_port *s = to_auart_port(u);
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u32 stat = readl(u->membase + AUART_STAT);
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u32 mctrl = 0;
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if (stat & AUART_STAT_CTS)
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mctrl |= TIOCM_CTS;
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return mctrl;
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return mctrl_gpio_get(s->gpios, &mctrl);
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}
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static int mxs_auart_dma_prep_rx(struct mxs_auart_port *s);
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@ -554,6 +564,10 @@ err_out:
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}
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#define RTS_AT_AUART() IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(s->gpios, \
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UART_GPIO_RTS))
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#define CTS_AT_AUART() IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(s->gpios, \
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UART_GPIO_CTS))
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static void mxs_auart_settermios(struct uart_port *u,
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struct ktermios *termios,
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struct ktermios *old)
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@ -630,6 +644,7 @@ static void mxs_auart_settermios(struct uart_port *u,
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ctrl |= AUART_LINECTRL_STP2;
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/* figure out the hardware flow control settings */
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ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN);
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if (cflag & CRTSCTS) {
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/*
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* The DMA has a bug(see errata:2836) in mx23.
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@ -644,9 +659,11 @@ static void mxs_auart_settermios(struct uart_port *u,
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ctrl2 |= AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE
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| AUART_CTRL2_DMAONERR;
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}
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ctrl2 |= AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN;
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} else {
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ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN);
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/* Even if RTS is GPIO line RTSEN can be enabled because
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* the pinctrl configuration decides about RTS pin function */
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ctrl2 |= AUART_CTRL2_RTSEN;
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if (CTS_AT_AUART())
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ctrl2 |= AUART_CTRL2_CTSEN;
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}
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/* set baud rate */
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@ -690,7 +707,9 @@ static irqreturn_t mxs_auart_irq_handle(int irq, void *context)
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s->port.membase + AUART_INTR_CLR);
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if (istat & AUART_INTR_CTSMIS) {
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uart_handle_cts_change(&s->port, stat & AUART_STAT_CTS);
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if (CTS_AT_AUART())
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uart_handle_cts_change(&s->port,
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stat & AUART_STAT_CTS);
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writel(AUART_INTR_CTSMIS,
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s->port.membase + AUART_INTR_CLR);
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istat &= ~AUART_INTR_CTSMIS;
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@ -1014,6 +1033,23 @@ static int serial_mxs_probe_dt(struct mxs_auart_port *s,
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return 0;
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}
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static bool mxs_auart_init_gpios(struct mxs_auart_port *s, struct device *dev)
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{
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s->gpios = mctrl_gpio_init(dev, 0);
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if (IS_ERR_OR_NULL(s->gpios))
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return false;
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/* Block (enabled before) DMA option if RTS or CTS is GPIO line */
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if (!RTS_AT_AUART() || !CTS_AT_AUART()) {
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if (test_bit(MXS_AUART_RTSCTS, &s->flags))
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dev_warn(dev,
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"DMA and flow control via gpio may cause some problems. DMA disabled!\n");
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clear_bit(MXS_AUART_RTSCTS, &s->flags);
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}
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return true;
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}
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static int mxs_auart_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id =
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@ -1069,6 +1105,10 @@ static int mxs_auart_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, s);
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if (!mxs_auart_init_gpios(s, &pdev->dev))
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dev_err(&pdev->dev,
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"Failed to initialize GPIOs. The serial port may not work as expected\n");
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auart_port[s->port.line] = s;
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mxs_auart_reset(&s->port);
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