dsa: mv88e6352/mv88e6xxx: Add support for Marvell 88E6320 and 88E6321
MV88E6320 and MV88E6321 are largely compatible to MV886352, but are members of a different chip family. Signed-off-by: Aleksey S. Kazantsev <ioctl@yandex.ru> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Aleksey S. Kazantsev
David S. Miller
parent
986ca37eae
commit
7c3d0d67d5
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@ -46,13 +46,13 @@ config NET_DSA_MV88E6171
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ethernet switches chips.
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config NET_DSA_MV88E6352
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tristate "Marvell 88E6172/88E6176/88E6352 ethernet switch chip support"
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tristate "Marvell 88E6172/6176/6320/6321/6352 ethernet switch chip support"
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depends on NET_DSA
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select NET_DSA_MV88E6XXX
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select NET_DSA_TAG_EDSA
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---help---
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This enables support for the Marvell 88E6172, 88E6176 and 88E6352
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ethernet switch chips.
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This enables support for the Marvell 88E6172, 88E6176, 88E6320,
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88E6321 and 88E6352 ethernet switch chips.
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config NET_DSA_BCM_SF2
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tristate "Broadcom Starfighter 2 Ethernet switch support"
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@ -36,6 +36,18 @@ static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
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return "Marvell 88E6172";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6176)
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return "Marvell 88E6176";
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if (ret == PORT_SWITCH_ID_6320_A1)
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return "Marvell 88E6320 (A1)";
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if (ret == PORT_SWITCH_ID_6320_A2)
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return "Marvell 88e6320 (A2)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6320)
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return "Marvell 88E6320";
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if (ret == PORT_SWITCH_ID_6321_A1)
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return "Marvell 88E6321 (A1)";
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if (ret == PORT_SWITCH_ID_6321_A2)
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return "Marvell 88e6321 (A2)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6321)
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return "Marvell 88E6321";
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if (ret == PORT_SWITCH_ID_6352_A0)
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return "Marvell 88E6352 (A0)";
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if (ret == PORT_SWITCH_ID_6352_A1)
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@ -84,11 +96,12 @@ static int mv88e6352_setup_global(struct dsa_switch *ds)
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static int mv88e6352_get_temp(struct dsa_switch *ds, int *temp)
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{
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int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
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int ret;
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*temp = 0;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 27);
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ret = mv88e6xxx_phy_page_read(ds, phy, 6, 27);
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if (ret < 0)
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return ret;
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@ -99,11 +112,12 @@ static int mv88e6352_get_temp(struct dsa_switch *ds, int *temp)
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static int mv88e6352_get_temp_limit(struct dsa_switch *ds, int *temp)
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{
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int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
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int ret;
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*temp = 0;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);
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ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26);
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if (ret < 0)
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return ret;
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@ -114,23 +128,25 @@ static int mv88e6352_get_temp_limit(struct dsa_switch *ds, int *temp)
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static int mv88e6352_set_temp_limit(struct dsa_switch *ds, int temp)
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{
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int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
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int ret;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);
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ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26);
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if (ret < 0)
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return ret;
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temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
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return mv88e6xxx_phy_page_write(ds, 0, 6, 26,
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return mv88e6xxx_phy_page_write(ds, phy, 6, 26,
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(ret & 0xe0ff) | (temp << 8));
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}
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static int mv88e6352_get_temp_alarm(struct dsa_switch *ds, bool *alarm)
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{
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int phy = mv88e6xxx_6320_family(ds) ? 3 : 0;
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int ret;
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*alarm = false;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);
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ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26);
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if (ret < 0)
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return ret;
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@ -394,5 +410,8 @@ struct dsa_switch_driver mv88e6352_switch_driver = {
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.fdb_getnext = mv88e6xxx_port_fdb_getnext,
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};
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MODULE_ALIAS("platform:mv88e6352");
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MODULE_ALIAS("platform:mv88e6172");
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MODULE_ALIAS("platform:mv88e6176");
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MODULE_ALIAS("platform:mv88e6320");
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MODULE_ALIAS("platform:mv88e6321");
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MODULE_ALIAS("platform:mv88e6352");
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@ -517,6 +517,18 @@ static bool mv88e6xxx_6185_family(struct dsa_switch *ds)
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return false;
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}
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bool mv88e6xxx_6320_family(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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switch (ps->id) {
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case PORT_SWITCH_ID_6320:
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case PORT_SWITCH_ID_6321:
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return true;
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}
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return false;
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}
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static bool mv88e6xxx_6351_family(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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@ -565,7 +577,7 @@ static int _mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port)
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{
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int ret;
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if (mv88e6xxx_6352_family(ds))
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if (mv88e6xxx_6320_family(ds) || mv88e6xxx_6352_family(ds))
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port = (port + 1) << 5;
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/* Snapshot the hardware statistics counters for this port. */
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@ -1377,7 +1389,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) ||
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mv88e6xxx_6065_family(ds)) {
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mv88e6xxx_6065_family(ds) || mv88e6xxx_6320_family(ds)) {
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/* MAC Forcing register: don't force link, speed,
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* duplex or flow control state to any particular
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* values on physical ports, but force the CPU port
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@ -1423,7 +1435,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) ||
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mv88e6xxx_6185_family(ds))
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mv88e6xxx_6185_family(ds) || mv88e6xxx_6320_family(ds))
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reg = PORT_CONTROL_IGMP_MLD_SNOOP |
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PORT_CONTROL_USE_TAG | PORT_CONTROL_USE_IP |
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PORT_CONTROL_STATE_FORWARDING;
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@ -1431,7 +1443,8 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds))
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reg |= PORT_CONTROL_DSA_TAG;
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds)) {
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA)
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reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA;
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else
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@ -1441,14 +1454,15 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) ||
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mv88e6xxx_6185_family(ds)) {
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mv88e6xxx_6185_family(ds) || mv88e6xxx_6320_family(ds)) {
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if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA)
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reg |= PORT_CONTROL_EGRESS_ADD_TAG;
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}
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}
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds)) {
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mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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if (ds->dsa_port_mask & (1 << port))
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reg |= PORT_CONTROL_FRAME_MODE_DSA;
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if (port == dsa_upstream_port(ds))
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@ -1473,11 +1487,11 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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reg = 0;
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6095_family(ds))
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mv88e6xxx_6095_family(ds) || mv88e6xxx_6320_family(ds))
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reg = PORT_CONTROL_2_MAP_DA;
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds))
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6320_family(ds))
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reg |= PORT_CONTROL_2_JUMBO_10240;
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if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) {
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@ -1514,7 +1528,8 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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goto abort;
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds)) {
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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/* Do not limit the period of time that this port can
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* be paused for by the remote end or the period of
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* time that this port can pause the remote end.
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@ -1564,7 +1579,8 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds)) {
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mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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/* Rate Control: disable ingress rate limiting. */
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ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),
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PORT_RATE_CONTROL, 0x0001);
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@ -1976,7 +1992,8 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
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(i << GLOBAL2_TRUNK_MAPPING_ID_SHIFT));
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds)) {
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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/* Send all frames with destination addresses matching
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* 01:80:c2:00:00:2x to the CPU port.
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*/
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@ -1995,7 +2012,8 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds)) {
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mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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/* Disable ingress rate limiting by resetting all
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* ingress rate limit registers to their initial
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* state.
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@ -89,7 +89,12 @@
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#define PORT_SWITCH_ID_6182 0x1a60
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#define PORT_SWITCH_ID_6185 0x1a70
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#define PORT_SWITCH_ID_6240 0x2400
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#define PORT_SWITCH_ID_6320 0x1250
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#define PORT_SWITCH_ID_6320 0x1150
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#define PORT_SWITCH_ID_6320_A1 0x1151
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#define PORT_SWITCH_ID_6320_A2 0x1152
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#define PORT_SWITCH_ID_6321 0x3100
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#define PORT_SWITCH_ID_6321_A1 0x3101
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#define PORT_SWITCH_ID_6321_A2 0x3102
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#define PORT_SWITCH_ID_6350 0x3710
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#define PORT_SWITCH_ID_6351 0x3750
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#define PORT_SWITCH_ID_6352 0x3520
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@ -410,6 +415,7 @@ int mv88e6xxx_port_fdb_getnext(struct dsa_switch *ds, int port,
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int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg);
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int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page,
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int reg, int val);
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bool mv88e6xxx_6320_family(struct dsa_switch *ds);
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extern struct dsa_switch_driver mv88e6131_switch_driver;
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extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
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extern struct dsa_switch_driver mv88e6352_switch_driver;
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