PCI: Coalesce host bridge contiguous apertures
Built-in graphics at 07:00.0 on HP EliteDesk 805 G6 doesn't work because graphics can't get the BAR it needs. The BIOS configuration is correct: BARs 0 and 2 both fit in the 00:08.1 bridge window. But that 00:08.1 window covers two host bridge apertures from _CRS. Previously we assumed this was illegal, so we clipped the window to fit into one aperture (see0f7e7aee2f
("PCI: Add pci_bus_clip_resource() to clip to fit upstream window")). pci_bus 0000:00: root bus resource [mem 0x10020200000-0x100303fffff window] pci_bus 0000:00: root bus resource [mem 0x10030400000-0x100401fffff window] pci 0000:00:08.1: bridge window [mem 0x10030000000-0x100401fffff 64bit pref] pci 0000:07:00.0: reg 0x10: [mem 0x10030000000-0x1003fffffff 64bit pref] pci 0000:07:00.0: reg 0x18: [mem 0x10040000000-0x100401fffff 64bit pref] pci 0000:00:08.1: can't claim BAR 15 [mem 0x10030000000-0x100401fffff 64bit pref]: no compatible bridge window pci 0000:00:08.1: [mem 0x10030000000-0x100401fffff 64bit pref] clipped to [mem 0x10030000000-0x100303fffff 64bit pref] pci 0000:00:08.1: bridge window [mem 0x10030000000-0x100303fffff 64bit pref] pci 0000:07:00.0: can't claim BAR 0 [mem 0x10030000000-0x1003fffffff 64bit pref]: no compatible bridge window pci 0000:07:00.0: can't claim BAR 2 [mem 0x10040000000-0x100401fffff 64bit pref]: no compatible bridge window However, the host bridge apertures are contiguous, so there's no need to clip in this case. Coalesce contiguous apertures so we can allocate from the entire contiguous region. Previous commit65db04053e
("PCI: Coalesce host bridge contiguous apertures") was similar but sorted the apertures, and Guenter Roeck reported a regression in ppc:sam460ex qemu emulation from nvme; see https://lore.kernel.org/all/20210709231529.GA3270116@roeck-us.net/ [bhelgaas: commit log] Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=212013 Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20210713125007.1260304-1-kai.heng.feng@canonical.com Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Guenter Roeck <linux@roeck-us.net>
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@ -883,11 +883,11 @@ static void pci_set_bus_msi_domain(struct pci_bus *bus)
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static int pci_register_host_bridge(struct pci_host_bridge *bridge)
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{
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struct device *parent = bridge->dev.parent;
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struct resource_entry *window, *n;
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struct resource_entry *window, *next, *n;
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struct pci_bus *bus, *b;
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resource_size_t offset;
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resource_size_t offset, next_offset;
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LIST_HEAD(resources);
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struct resource *res;
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struct resource *res, *next_res;
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char addr[64], *fmt;
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const char *name;
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int err;
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@ -970,11 +970,34 @@ static int pci_register_host_bridge(struct pci_host_bridge *bridge)
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if (nr_node_ids > 1 && pcibus_to_node(bus) == NUMA_NO_NODE)
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dev_warn(&bus->dev, "Unknown NUMA node; performance will be reduced\n");
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/* Add initial resources to the bus */
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/* Coalesce contiguous windows */
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resource_list_for_each_entry_safe(window, n, &resources) {
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list_move_tail(&window->node, &bridge->windows);
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if (list_is_last(&window->node, &resources))
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break;
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next = list_next_entry(window, node);
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offset = window->offset;
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res = window->res;
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next_offset = next->offset;
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next_res = next->res;
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if (res->flags != next_res->flags || offset != next_offset)
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continue;
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if (res->end + 1 == next_res->start) {
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next_res->start = res->start;
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res->flags = res->start = res->end = 0;
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}
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}
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/* Add initial resources to the bus */
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resource_list_for_each_entry_safe(window, n, &resources) {
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offset = window->offset;
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res = window->res;
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if (!res->end)
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continue;
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list_move_tail(&window->node, &bridge->windows);
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if (res->flags & IORESOURCE_BUS)
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pci_bus_insert_busn_res(bus, bus->number, res->end);
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