drm/radeon/cik: fill in startup/shutdown callbacks (v5)
v2: update to latest driver changes v3: properly tear down vm on suspend v4: fix up irq init ordering v5: remove outdated comment Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
This commit is contained in:
Alex Deucher
parent
d0e092d969
commit
7bf94a2c18
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@ -73,6 +73,8 @@ extern void r600_ih_ring_fini(struct radeon_device *rdev);
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extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
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extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
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extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
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extern void si_rlc_fini(struct radeon_device *rdev);
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extern int si_rlc_init(struct radeon_device *rdev);
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#define BONAIRE_IO_MC_REGS_SIZE 36
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@ -4681,3 +4683,337 @@ restart_ih:
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return IRQ_HANDLED;
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}
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/*
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* startup/shutdown callbacks
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*/
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/**
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* cik_startup - program the asic to a functional state
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*
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* @rdev: radeon_device pointer
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*
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* Programs the asic to a functional state (CIK).
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* Called by cik_init() and cik_resume().
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* Returns 0 for success, error for failure.
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*/
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static int cik_startup(struct radeon_device *rdev)
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{
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struct radeon_ring *ring;
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int r;
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if (rdev->flags & RADEON_IS_IGP) {
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if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw ||
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!rdev->mec_fw || !rdev->sdma_fw || !rdev->rlc_fw) {
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r = cik_init_microcode(rdev);
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if (r) {
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DRM_ERROR("Failed to load firmware!\n");
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return r;
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}
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}
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} else {
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if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw ||
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!rdev->mec_fw || !rdev->sdma_fw || !rdev->rlc_fw ||
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!rdev->mc_fw) {
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r = cik_init_microcode(rdev);
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if (r) {
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DRM_ERROR("Failed to load firmware!\n");
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return r;
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}
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}
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r = ci_mc_load_microcode(rdev);
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if (r) {
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DRM_ERROR("Failed to load MC firmware!\n");
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return r;
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}
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}
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r = r600_vram_scratch_init(rdev);
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if (r)
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return r;
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cik_mc_program(rdev);
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r = cik_pcie_gart_enable(rdev);
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if (r)
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return r;
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cik_gpu_init(rdev);
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/* allocate rlc buffers */
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r = si_rlc_init(rdev);
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if (r) {
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DRM_ERROR("Failed to init rlc BOs!\n");
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return r;
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}
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/* allocate wb buffer */
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r = radeon_wb_init(rdev);
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if (r)
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return r;
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r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX);
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if (r) {
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dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r);
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return r;
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}
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r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_DMA_INDEX);
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if (r) {
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dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r);
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return r;
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}
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r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_DMA1_INDEX);
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if (r) {
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dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r);
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return r;
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}
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/* Enable IRQ */
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if (!rdev->irq.installed) {
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r = radeon_irq_kms_init(rdev);
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if (r)
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return r;
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}
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r = cik_irq_init(rdev);
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if (r) {
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DRM_ERROR("radeon: IH init failed (%d).\n", r);
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radeon_irq_kms_fini(rdev);
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return r;
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}
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cik_irq_set(rdev);
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ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
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r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,
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CP_RB0_RPTR, CP_RB0_WPTR,
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0, 0xfffff, RADEON_CP_PACKET2);
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if (r)
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return r;
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ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];
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r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET,
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SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET,
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SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET,
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2, 0xfffffffc, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0));
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if (r)
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return r;
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ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX];
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r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET,
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SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET,
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SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET,
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2, 0xfffffffc, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0));
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if (r)
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return r;
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r = cik_cp_resume(rdev);
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if (r)
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return r;
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r = cik_sdma_resume(rdev);
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if (r)
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return r;
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r = radeon_ib_pool_init(rdev);
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if (r) {
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dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
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return r;
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}
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r = radeon_vm_manager_init(rdev);
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if (r) {
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dev_err(rdev->dev, "vm manager initialization failed (%d).\n", r);
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return r;
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}
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return 0;
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}
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/**
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* cik_resume - resume the asic to a functional state
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*
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* @rdev: radeon_device pointer
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*
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* Programs the asic to a functional state (CIK).
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* Called at resume.
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* Returns 0 for success, error for failure.
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*/
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int cik_resume(struct radeon_device *rdev)
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{
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int r;
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/* post card */
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atom_asic_init(rdev->mode_info.atom_context);
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rdev->accel_working = true;
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r = cik_startup(rdev);
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if (r) {
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DRM_ERROR("cik startup failed on resume\n");
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rdev->accel_working = false;
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return r;
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}
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return r;
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}
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/**
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* cik_suspend - suspend the asic
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*
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* @rdev: radeon_device pointer
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*
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* Bring the chip into a state suitable for suspend (CIK).
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* Called at suspend.
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* Returns 0 for success.
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*/
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int cik_suspend(struct radeon_device *rdev)
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{
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radeon_vm_manager_fini(rdev);
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cik_cp_enable(rdev, false);
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cik_sdma_enable(rdev, false);
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cik_irq_suspend(rdev);
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radeon_wb_disable(rdev);
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cik_pcie_gart_disable(rdev);
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return 0;
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}
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/* Plan is to move initialization in that function and use
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* helper function so that radeon_device_init pretty much
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* do nothing more than calling asic specific function. This
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* should also allow to remove a bunch of callback function
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* like vram_info.
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*/
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/**
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* cik_init - asic specific driver and hw init
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*
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* @rdev: radeon_device pointer
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*
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* Setup asic specific driver variables and program the hw
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* to a functional state (CIK).
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* Called at driver startup.
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* Returns 0 for success, errors for failure.
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*/
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int cik_init(struct radeon_device *rdev)
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{
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struct radeon_ring *ring;
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int r;
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/* Read BIOS */
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if (!radeon_get_bios(rdev)) {
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if (ASIC_IS_AVIVO(rdev))
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return -EINVAL;
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}
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/* Must be an ATOMBIOS */
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if (!rdev->is_atom_bios) {
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dev_err(rdev->dev, "Expecting atombios for cayman GPU\n");
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return -EINVAL;
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}
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r = radeon_atombios_init(rdev);
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if (r)
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return r;
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/* Post card if necessary */
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if (!radeon_card_posted(rdev)) {
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if (!rdev->bios) {
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dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
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return -EINVAL;
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}
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DRM_INFO("GPU not posted. posting now...\n");
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atom_asic_init(rdev->mode_info.atom_context);
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}
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/* Initialize scratch registers */
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cik_scratch_init(rdev);
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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/* Initialize clocks */
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radeon_get_clock_info(rdev->ddev);
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/* Fence driver */
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r = radeon_fence_driver_init(rdev);
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if (r)
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return r;
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/* initialize memory controller */
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r = cik_mc_init(rdev);
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if (r)
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return r;
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/* Memory manager */
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r = radeon_bo_init(rdev);
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if (r)
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return r;
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ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
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ring->ring_obj = NULL;
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r600_ring_init(rdev, ring, 1024 * 1024);
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ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];
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ring->ring_obj = NULL;
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r600_ring_init(rdev, ring, 256 * 1024);
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ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX];
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ring->ring_obj = NULL;
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r600_ring_init(rdev, ring, 256 * 1024);
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rdev->ih.ring_obj = NULL;
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r600_ih_ring_init(rdev, 64 * 1024);
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r = r600_pcie_gart_init(rdev);
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if (r)
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return r;
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rdev->accel_working = true;
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r = cik_startup(rdev);
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if (r) {
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dev_err(rdev->dev, "disabling GPU acceleration\n");
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cik_cp_fini(rdev);
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cik_sdma_fini(rdev);
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cik_irq_fini(rdev);
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si_rlc_fini(rdev);
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radeon_wb_fini(rdev);
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radeon_ib_pool_fini(rdev);
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radeon_vm_manager_fini(rdev);
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radeon_irq_kms_fini(rdev);
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cik_pcie_gart_fini(rdev);
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rdev->accel_working = false;
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}
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/* Don't start up if the MC ucode is missing.
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* The default clocks and voltages before the MC ucode
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* is loaded are not suffient for advanced operations.
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*/
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if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) {
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DRM_ERROR("radeon: MC ucode required for NI+.\n");
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return -EINVAL;
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}
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return 0;
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}
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/**
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* cik_fini - asic specific driver and hw fini
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*
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* @rdev: radeon_device pointer
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*
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* Tear down the asic specific driver variables and program the hw
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* to an idle state (CIK).
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* Called at driver unload.
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*/
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void cik_fini(struct radeon_device *rdev)
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{
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cik_cp_fini(rdev);
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cik_sdma_fini(rdev);
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cik_irq_fini(rdev);
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si_rlc_fini(rdev);
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radeon_wb_fini(rdev);
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radeon_vm_manager_fini(rdev);
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radeon_ib_pool_fini(rdev);
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radeon_irq_kms_fini(rdev);
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cik_pcie_gart_fini(rdev);
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r600_vram_scratch_fini(rdev);
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radeon_gem_fini(rdev);
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radeon_fence_driver_fini(rdev);
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radeon_bo_fini(rdev);
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radeon_atombios_fini(rdev);
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kfree(rdev->bios);
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rdev->bios = NULL;
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}
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