hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

i.MX fixes for 5.3: 

- Fix i.MX8MM SAI3 RXC/TXFS pinmux configuration.
  - Fix i.MX7ULP usb-phy unit address to drop extra '0x' notation.
  - Fix typo of clock frequency property name in a few i.MX6UL board
    I2C buses.
  - Drop "fsl,imx6sx-sai" from i.MX8M SAI device, as it's not compatible
    with i.MX6SX SAI.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdNs2iAAoJEFBXWFqHsHzOyZ8H/3u3AjWSJxUa845cro1Q/Ibh
 Ap2Skk9NgX3Wo9oRaet6Nc44iXG4zBXYfhVyzUG5H6t2mk4S2c2RaKLd55n6mHz0
 6q1G57Z9ogxBzXrWgbiZtlCOlzZCNXVWZiB5eIUT12Mway+0HMEe4zcKAEvADZnt
 c2tFf2AbjRe0ye1M2a6V09/TunIT8Hv2XH88vA4MxAJauOWNTkx4TrmXVNnokax+
 S5Ha0Djr7seuHf6HLr95lB7QAj0ozTpZY17HsOmdFaO2UREVftm7JMhaNmxL072u
 by1hwAALp9vYaDDzfw+7NjaquJiF6rGO6Vgi78d3brBFcXPSXmXpufUffl1aFWE=
 =pQlh
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.3:
 - Fix i.MX8MM SAI3 RXC/TXFS pinmux configuration.
 - Fix i.MX7ULP usb-phy unit address to drop extra '0x' notation.
 - Fix typo of clock frequency property name in a few i.MX6UL board
   I2C buses.
 - Drop "fsl,imx6sx-sai" from i.MX8M SAI device, as it's not compatible
   with i.MX6SX SAI.

* tag 'imx-fixes-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8mq: fix SAI compatible
  arm64: dts: imx8mm: Correct SAI3 RXC/TXFS pin's mux option #1
  ARM: dts: imx6ul: fix clock frequency property name of I2C buses
  ARM: dts: imx7ulp: Fix usb-phy unit address format

Link: https://lore.kernel.org/r/20190723090827.GU15632@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-07-23 10:13:23 -07:00
parent 02a0242549 8d0148473d
commit 7bd9d46514
8 changed files with 10 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
View File

@ -112,7 +112,7 @@
};
&i2c2 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";

2
arch/arm/boot/dts/imx6ul-geam.dts
View File

@ -156,7 +156,7 @@
};
&i2c2 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";

2
arch/arm/boot/dts/imx6ul-isiot.dtsi
View File

@ -148,7 +148,7 @@
};
&i2c2 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";

2
arch/arm/boot/dts/imx6ul-pico-hobbit.dts
View File

@ -43,7 +43,7 @@
};
&i2c2 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";

4
arch/arm/boot/dts/imx6ul-pico-pi.dts
View File

@ -43,7 +43,7 @@
};
&i2c2 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
@ -58,7 +58,7 @@
};
&i2c3 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";

2
arch/arm/boot/dts/imx7ulp.dtsi
View File

@ -186,7 +186,7 @@
reg = <0x40330200 0x200>;
};
usbphy1: usb-phy@0x40350000 {
usbphy1: usb-phy@40350000 {
compatible = "fsl,imx7ulp-usbphy", "fsl,imx6ul-usbphy";
reg = <0x40350000 0x1000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;

4
arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
View File

@ -462,7 +462,7 @@
#define MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x1CC 0x434 0x000 0x5 0x0
#define MX8MM_IOMUXC_SAI3_RXFS_TPSMP_HTRANS0 0x1CC 0x434 0x000 0x7 0x0
#define MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0x1D0 0x438 0x000 0x0 0x0
#define MX8MM_IOMUXC_SAI3_RXC_GPT1_CAPTURE2 0x1D0 0x438 0x000 0x1 0x0
#define MX8MM_IOMUXC_SAI3_RXC_GPT1_CLK 0x1D0 0x438 0x000 0x1 0x0
#define MX8MM_IOMUXC_SAI3_RXC_SAI5_RX_BCLK 0x1D0 0x438 0x4D0 0x2 0x2
#define MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x1D0 0x438 0x000 0x5 0x0
#define MX8MM_IOMUXC_SAI3_RXC_TPSMP_HTRANS1 0x1D0 0x438 0x000 0x7 0x0
@ -472,7 +472,7 @@
#define MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x1D4 0x43C 0x000 0x5 0x0
#define MX8MM_IOMUXC_SAI3_RXD_TPSMP_HDATA0 0x1D4 0x43C 0x000 0x7 0x0
#define MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x1D8 0x440 0x000 0x0 0x0
#define MX8MM_IOMUXC_SAI3_TXFS_GPT1_CLK 0x1D8 0x440 0x000 0x1 0x0
#define MX8MM_IOMUXC_SAI3_TXFS_GPT1_CAPTURE2 0x1D8 0x440 0x000 0x1 0x0
#define MX8MM_IOMUXC_SAI3_TXFS_SAI5_RX_DATA1 0x1D8 0x440 0x4D8 0x2 0x2
#define MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x1D8 0x440 0x000 0x5 0x0
#define MX8MM_IOMUXC_SAI3_TXFS_TPSMP_HDATA1 0x1D8 0x440 0x000 0x7 0x0

3
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@ -715,8 +715,7 @@
sai2: sai@308b0000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx8mq-sai",
"fsl,imx6sx-sai";
compatible = "fsl,imx8mq-sai";
reg = <0x308b0000 0x10000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,