mmc: core: Remove MMC_CAP_RUNTIME_RESUME as it's redundant
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -239,20 +239,12 @@ static int dw_mci_rockchip_init(struct dw_mci *host)
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return 0;
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}
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/* Common capabilities of RK3288 SoC */
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static unsigned long dw_mci_rk3288_dwmmc_caps[4] = {
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MMC_CAP_RUNTIME_RESUME, /* emmc */
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MMC_CAP_RUNTIME_RESUME, /* sdmmc */
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MMC_CAP_RUNTIME_RESUME, /* sdio0 */
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MMC_CAP_RUNTIME_RESUME, /* sdio1 */
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};
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static const struct dw_mci_drv_data rk2928_drv_data = {
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.prepare_command = dw_mci_rockchip_prepare_command,
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.init = dw_mci_rockchip_init,
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};
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static const struct dw_mci_drv_data rk3288_drv_data = {
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.caps = dw_mci_rk3288_dwmmc_caps,
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.prepare_command = dw_mci_rockchip_prepare_command,
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.set_ios = dw_mci_rk3288_set_ios,
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.execute_tuning = dw_mci_rk3288_execute_tuning,
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@ -1543,7 +1543,6 @@ static int msdc_drv_probe(struct platform_device *pdev)
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mmc->f_min = host->src_clk_freq / (4 * 255);
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mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23;
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mmc->caps |= MMC_CAP_RUNTIME_RESUME;
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/* MMC core transfer sizes tunable parameters */
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mmc->max_segs = MAX_BD_NUM;
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mmc->max_seg_size = BDMA_DESC_BUFLEN;
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@ -259,7 +259,6 @@ struct mmc_host {
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#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
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#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
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#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
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#define MMC_CAP_RUNTIME_RESUME (1 << 20) /* Resume at runtime_resume. */
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#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
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#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
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#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
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