[ARM SMP] Ensure secondary CPUs see their pen release
Since the secondary CPUs will not be operating in symetric mode while they are held in the pen, we need to ensure that the write to pen_release is visible to them, by flushing the cache. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -15,6 +15,7 @@
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#include <linux/mm.h>
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#include <asm/atomic.h>
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#include <asm/cacheflush.h>
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#include <asm/delay.h>
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#include <asm/mmu_context.h>
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#include <asm/procinfo.h>
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@ -80,6 +81,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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* "cpu" is Linux's internal ID.
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*/
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pen_release = cpu;
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flush_cache_all();
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/*
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* XXX
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