caif: remove caif_shm
caif_shm is an old implementation caif_shm will be replaced by caif_virtio [ As explained by Linus Walleij: "U5500 used this, but was cancelled and the silicon did not reach anyone outside ST-Ericsson. Then for the next platforms, we have gone for the leaner & cleaner approach of using virtio, rpmesg and rproc." ] Signed-off-by: Erwan Yvin <erwan.yvin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sjur Brendeland <sjur.brandeland@stericsson.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
35353c2b42
commit
7a87590338
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@ -32,13 +32,6 @@ config CAIF_SPI_SYNC
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help to synchronize to the next transfer in case of over or under-runs.
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This option also needs to be enabled on the modem.
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config CAIF_SHM
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tristate "CAIF shared memory protocol driver"
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depends on CAIF && U5500_MBOX
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default n
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---help---
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The CAIF shared memory protocol driver for the STE UX5500 platform.
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config CAIF_HSI
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tristate "CAIF HSI transport driver"
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depends on CAIF
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@ -7,9 +7,5 @@ obj-$(CONFIG_CAIF_TTY) += caif_serial.o
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cfspi_slave-objs := caif_spi.o caif_spi_slave.o
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obj-$(CONFIG_CAIF_SPI_SLAVE) += cfspi_slave.o
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# Shared memory
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caif_shm-objs := caif_shmcore.o caif_shm_u5500.o
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obj-$(CONFIG_CAIF_SHM) += caif_shm.o
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# HSI interface
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obj-$(CONFIG_CAIF_HSI) += caif_hsi.o
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@ -1,128 +0,0 @@
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/*
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* Copyright (C) ST-Ericsson AB 2010
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* Contact: Sjur Brendeland / sjur.brandeland@stericsson.com
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* Author: Amarnath Revanna / amarnath.bangalore.revanna@stericsson.com
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* License terms: GNU General Public License (GPL) version 2
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ":" fmt
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <mach/mbox-db5500.h>
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#include <net/caif/caif_shm.h>
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("CAIF Shared Memory protocol driver");
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#define MAX_SHM_INSTANCES 1
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enum {
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MBX_ACC0,
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MBX_ACC1,
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MBX_DSP
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};
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static struct shmdev_layer shmdev_lyr[MAX_SHM_INSTANCES];
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static unsigned int shm_start;
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static unsigned int shm_size;
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module_param(shm_size, uint , 0440);
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MODULE_PARM_DESC(shm_total_size, "Start of SHM shared memory");
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module_param(shm_start, uint , 0440);
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MODULE_PARM_DESC(shm_total_start, "Total Size of SHM shared memory");
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static int shmdev_send_msg(u32 dev_id, u32 mbx_msg)
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{
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/* Always block until msg is written successfully */
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mbox_send(shmdev_lyr[dev_id].hmbx, mbx_msg, true);
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return 0;
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}
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static int shmdev_mbx_setup(void *pshmdrv_cb, struct shmdev_layer *pshm_dev,
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void *pshm_drv)
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{
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/*
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* For UX5500, we have only 1 SHM instance which uses MBX0
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* for communication with the peer modem
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*/
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pshm_dev->hmbx = mbox_setup(MBX_ACC0, pshmdrv_cb, pshm_drv);
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if (!pshm_dev->hmbx)
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return -ENODEV;
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else
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return 0;
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}
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static int __init caif_shmdev_init(void)
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{
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int i, result;
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/* Loop is currently overkill, there is only one instance */
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for (i = 0; i < MAX_SHM_INSTANCES; i++) {
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shmdev_lyr[i].shm_base_addr = shm_start;
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shmdev_lyr[i].shm_total_sz = shm_size;
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if (((char *)shmdev_lyr[i].shm_base_addr == NULL)
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|| (shmdev_lyr[i].shm_total_sz <= 0)) {
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pr_warn("ERROR,"
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"Shared memory Address and/or Size incorrect"
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", Bailing out ...\n");
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result = -EINVAL;
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goto clean;
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}
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pr_info("SHM AREA (instance %d) STARTS"
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" AT %p\n", i, (char *)shmdev_lyr[i].shm_base_addr);
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shmdev_lyr[i].shm_id = i;
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shmdev_lyr[i].pshmdev_mbxsend = shmdev_send_msg;
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shmdev_lyr[i].pshmdev_mbxsetup = shmdev_mbx_setup;
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/*
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* Finally, CAIF core module is called with details in place:
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* 1. SHM base address
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* 2. SHM size
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* 3. MBX handle
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*/
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result = caif_shmcore_probe(&shmdev_lyr[i]);
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if (result) {
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pr_warn("ERROR[%d],"
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"Could not probe SHM core (instance %d)"
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" Bailing out ...\n", result, i);
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goto clean;
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}
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}
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return 0;
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clean:
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/*
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* For now, we assume that even if one instance of SHM fails, we bail
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* out of the driver support completely. For this, we need to release
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* any memory allocated and unregister any instance of SHM net device.
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*/
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for (i = 0; i < MAX_SHM_INSTANCES; i++) {
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if (shmdev_lyr[i].pshm_netdev)
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unregister_netdev(shmdev_lyr[i].pshm_netdev);
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}
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return result;
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}
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static void __exit caif_shmdev_exit(void)
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{
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int i;
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for (i = 0; i < MAX_SHM_INSTANCES; i++) {
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caif_shmcore_remove(shmdev_lyr[i].pshm_netdev);
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kfree((void *)shmdev_lyr[i].shm_base_addr);
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}
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}
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module_init(caif_shmdev_init);
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module_exit(caif_shmdev_exit);
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@ -1,744 +0,0 @@
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/*
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* Copyright (C) ST-Ericsson AB 2010
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* Contact: Sjur Brendeland / sjur.brandeland@stericsson.com
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* Authors: Amarnath Revanna / amarnath.bangalore.revanna@stericsson.com,
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* Daniel Martensson / daniel.martensson@stericsson.com
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* License terms: GNU General Public License (GPL) version 2
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ":" fmt
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#include <linux/spinlock.h>
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#include <linux/sched.h>
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#include <linux/list.h>
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#include <linux/netdevice.h>
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#include <linux/if_arp.h>
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#include <linux/io.h>
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#include <net/caif/caif_device.h>
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#include <net/caif/caif_shm.h>
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#define NR_TX_BUF 6
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#define NR_RX_BUF 6
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#define TX_BUF_SZ 0x2000
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#define RX_BUF_SZ 0x2000
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#define CAIF_NEEDED_HEADROOM 32
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#define CAIF_FLOW_ON 1
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#define CAIF_FLOW_OFF 0
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#define LOW_WATERMARK 3
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#define HIGH_WATERMARK 4
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/* Maximum number of CAIF buffers per shared memory buffer. */
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#define SHM_MAX_FRMS_PER_BUF 10
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/*
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* Size in bytes of the descriptor area
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* (With end of descriptor signalling)
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*/
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#define SHM_CAIF_DESC_SIZE ((SHM_MAX_FRMS_PER_BUF + 1) * \
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sizeof(struct shm_pck_desc))
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/*
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* Offset to the first CAIF frame within a shared memory buffer.
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* Aligned on 32 bytes.
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*/
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#define SHM_CAIF_FRM_OFS (SHM_CAIF_DESC_SIZE + (SHM_CAIF_DESC_SIZE % 32))
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/* Number of bytes for CAIF shared memory header. */
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#define SHM_HDR_LEN 1
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/* Number of padding bytes for the complete CAIF frame. */
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#define SHM_FRM_PAD_LEN 4
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#define CAIF_MAX_MTU 4096
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#define SHM_SET_FULL(x) (((x+1) & 0x0F) << 0)
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#define SHM_GET_FULL(x) (((x >> 0) & 0x0F) - 1)
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#define SHM_SET_EMPTY(x) (((x+1) & 0x0F) << 4)
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#define SHM_GET_EMPTY(x) (((x >> 4) & 0x0F) - 1)
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#define SHM_FULL_MASK (0x0F << 0)
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#define SHM_EMPTY_MASK (0x0F << 4)
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struct shm_pck_desc {
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/*
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* Offset from start of shared memory area to start of
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* shared memory CAIF frame.
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*/
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u32 frm_ofs;
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u32 frm_len;
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};
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struct buf_list {
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unsigned char *desc_vptr;
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u32 phy_addr;
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u32 index;
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u32 len;
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u32 frames;
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u32 frm_ofs;
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struct list_head list;
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};
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struct shm_caif_frm {
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/* Number of bytes of padding before the CAIF frame. */
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u8 hdr_ofs;
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};
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struct shmdrv_layer {
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/* caif_dev_common must always be first in the structure*/
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struct caif_dev_common cfdev;
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u32 shm_tx_addr;
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u32 shm_rx_addr;
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u32 shm_base_addr;
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u32 tx_empty_available;
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spinlock_t lock;
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struct list_head tx_empty_list;
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struct list_head tx_pend_list;
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struct list_head tx_full_list;
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struct list_head rx_empty_list;
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struct list_head rx_pend_list;
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struct list_head rx_full_list;
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struct workqueue_struct *pshm_tx_workqueue;
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struct workqueue_struct *pshm_rx_workqueue;
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struct work_struct shm_tx_work;
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struct work_struct shm_rx_work;
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struct sk_buff_head sk_qhead;
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struct shmdev_layer *pshm_dev;
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};
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static int shm_netdev_open(struct net_device *shm_netdev)
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{
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netif_wake_queue(shm_netdev);
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return 0;
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}
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static int shm_netdev_close(struct net_device *shm_netdev)
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{
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netif_stop_queue(shm_netdev);
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return 0;
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}
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int caif_shmdrv_rx_cb(u32 mbx_msg, void *priv)
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{
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struct buf_list *pbuf;
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struct shmdrv_layer *pshm_drv;
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struct list_head *pos;
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u32 avail_emptybuff = 0;
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unsigned long flags = 0;
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pshm_drv = priv;
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/* Check for received buffers. */
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if (mbx_msg & SHM_FULL_MASK) {
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int idx;
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spin_lock_irqsave(&pshm_drv->lock, flags);
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/* Check whether we have any outstanding buffers. */
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if (list_empty(&pshm_drv->rx_empty_list)) {
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/* Release spin lock. */
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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/* We print even in IRQ context... */
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pr_warn("No empty Rx buffers to fill: "
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"mbx_msg:%x\n", mbx_msg);
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/* Bail out. */
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goto err_sync;
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}
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pbuf =
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list_entry(pshm_drv->rx_empty_list.next,
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struct buf_list, list);
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idx = pbuf->index;
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/* Check buffer synchronization. */
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if (idx != SHM_GET_FULL(mbx_msg)) {
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/* We print even in IRQ context... */
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pr_warn(
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"phyif_shm_mbx_msg_cb: RX full out of sync:"
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" idx:%d, msg:%x SHM_GET_FULL(mbx_msg):%x\n",
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idx, mbx_msg, SHM_GET_FULL(mbx_msg));
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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/* Bail out. */
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goto err_sync;
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}
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list_del_init(&pbuf->list);
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list_add_tail(&pbuf->list, &pshm_drv->rx_full_list);
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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/* Schedule RX work queue. */
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if (!work_pending(&pshm_drv->shm_rx_work))
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queue_work(pshm_drv->pshm_rx_workqueue,
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&pshm_drv->shm_rx_work);
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}
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/* Check for emptied buffers. */
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if (mbx_msg & SHM_EMPTY_MASK) {
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int idx;
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spin_lock_irqsave(&pshm_drv->lock, flags);
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/* Check whether we have any outstanding buffers. */
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if (list_empty(&pshm_drv->tx_full_list)) {
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/* We print even in IRQ context... */
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pr_warn("No TX to empty: msg:%x\n", mbx_msg);
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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/* Bail out. */
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goto err_sync;
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}
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pbuf =
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list_entry(pshm_drv->tx_full_list.next,
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struct buf_list, list);
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idx = pbuf->index;
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/* Check buffer synchronization. */
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if (idx != SHM_GET_EMPTY(mbx_msg)) {
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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/* We print even in IRQ context... */
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pr_warn("TX empty "
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"out of sync:idx:%d, msg:%x\n", idx, mbx_msg);
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/* Bail out. */
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goto err_sync;
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}
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list_del_init(&pbuf->list);
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/* Reset buffer parameters. */
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pbuf->frames = 0;
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pbuf->frm_ofs = SHM_CAIF_FRM_OFS;
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list_add_tail(&pbuf->list, &pshm_drv->tx_empty_list);
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/* Check the available no. of buffers in the empty list */
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list_for_each(pos, &pshm_drv->tx_empty_list)
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avail_emptybuff++;
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/* Check whether we have to wake up the transmitter. */
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if ((avail_emptybuff > HIGH_WATERMARK) &&
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(!pshm_drv->tx_empty_available)) {
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pshm_drv->tx_empty_available = 1;
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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pshm_drv->cfdev.flowctrl
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(pshm_drv->pshm_dev->pshm_netdev,
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CAIF_FLOW_ON);
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/* Schedule the work queue. if required */
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if (!work_pending(&pshm_drv->shm_tx_work))
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queue_work(pshm_drv->pshm_tx_workqueue,
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&pshm_drv->shm_tx_work);
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} else
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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}
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return 0;
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err_sync:
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return -EIO;
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}
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static void shm_rx_work_func(struct work_struct *rx_work)
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{
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struct shmdrv_layer *pshm_drv;
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struct buf_list *pbuf;
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unsigned long flags = 0;
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struct sk_buff *skb;
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char *p;
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int ret;
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pshm_drv = container_of(rx_work, struct shmdrv_layer, shm_rx_work);
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while (1) {
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struct shm_pck_desc *pck_desc;
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spin_lock_irqsave(&pshm_drv->lock, flags);
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/* Check for received buffers. */
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if (list_empty(&pshm_drv->rx_full_list)) {
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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break;
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}
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pbuf =
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list_entry(pshm_drv->rx_full_list.next, struct buf_list,
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list);
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list_del_init(&pbuf->list);
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spin_unlock_irqrestore(&pshm_drv->lock, flags);
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/* Retrieve pointer to start of the packet descriptor area. */
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pck_desc = (struct shm_pck_desc *) pbuf->desc_vptr;
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/*
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* Check whether descriptor contains a CAIF shared memory
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* frame.
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*/
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while (pck_desc->frm_ofs) {
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unsigned int frm_buf_ofs;
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unsigned int frm_pck_ofs;
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unsigned int frm_pck_len;
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/*
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* Check whether offset is within buffer limits
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* (lower).
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*/
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if (pck_desc->frm_ofs <
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(pbuf->phy_addr - pshm_drv->shm_base_addr))
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break;
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/*
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* Check whether offset is within buffer limits
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* (higher).
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*/
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if (pck_desc->frm_ofs >
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((pbuf->phy_addr - pshm_drv->shm_base_addr) +
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pbuf->len))
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break;
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/* Calculate offset from start of buffer. */
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frm_buf_ofs =
|
||||
pck_desc->frm_ofs - (pbuf->phy_addr -
|
||||
pshm_drv->shm_base_addr);
|
||||
|
||||
/*
|
||||
* Calculate offset and length of CAIF packet while
|
||||
* taking care of the shared memory header.
|
||||
*/
|
||||
frm_pck_ofs =
|
||||
frm_buf_ofs + SHM_HDR_LEN +
|
||||
(*(pbuf->desc_vptr + frm_buf_ofs));
|
||||
frm_pck_len =
|
||||
(pck_desc->frm_len - SHM_HDR_LEN -
|
||||
(*(pbuf->desc_vptr + frm_buf_ofs)));
|
||||
|
||||
/* Check whether CAIF packet is within buffer limits */
|
||||
if ((frm_pck_ofs + pck_desc->frm_len) > pbuf->len)
|
||||
break;
|
||||
|
||||
/* Get a suitable CAIF packet and copy in data. */
|
||||
skb = netdev_alloc_skb(pshm_drv->pshm_dev->pshm_netdev,
|
||||
frm_pck_len + 1);
|
||||
if (skb == NULL)
|
||||
break;
|
||||
|
||||
p = skb_put(skb, frm_pck_len);
|
||||
memcpy(p, pbuf->desc_vptr + frm_pck_ofs, frm_pck_len);
|
||||
|
||||
skb->protocol = htons(ETH_P_CAIF);
|
||||
skb_reset_mac_header(skb);
|
||||
skb->dev = pshm_drv->pshm_dev->pshm_netdev;
|
||||
|
||||
/* Push received packet up the stack. */
|
||||
ret = netif_rx_ni(skb);
|
||||
|
||||
if (!ret) {
|
||||
pshm_drv->pshm_dev->pshm_netdev->stats.
|
||||
rx_packets++;
|
||||
pshm_drv->pshm_dev->pshm_netdev->stats.
|
||||
rx_bytes += pck_desc->frm_len;
|
||||
} else
|
||||
++pshm_drv->pshm_dev->pshm_netdev->stats.
|
||||
rx_dropped;
|
||||
/* Move to next packet descriptor. */
|
||||
pck_desc++;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&pshm_drv->lock, flags);
|
||||
list_add_tail(&pbuf->list, &pshm_drv->rx_pend_list);
|
||||
|
||||
spin_unlock_irqrestore(&pshm_drv->lock, flags);
|
||||
|
||||
}
|
||||
|
||||
/* Schedule the work queue. if required */
|
||||
if (!work_pending(&pshm_drv->shm_tx_work))
|
||||
queue_work(pshm_drv->pshm_tx_workqueue, &pshm_drv->shm_tx_work);
|
||||
|
||||
}
|
||||
|
||||
static void shm_tx_work_func(struct work_struct *tx_work)
|
||||
{
|
||||
u32 mbox_msg;
|
||||
unsigned int frmlen, avail_emptybuff, append = 0;
|
||||
unsigned long flags = 0;
|
||||
struct buf_list *pbuf = NULL;
|
||||
struct shmdrv_layer *pshm_drv;
|
||||
struct shm_caif_frm *frm;
|
||||
struct sk_buff *skb;
|
||||
struct shm_pck_desc *pck_desc;
|
||||
struct list_head *pos;
|
||||
|
||||
pshm_drv = container_of(tx_work, struct shmdrv_layer, shm_tx_work);
|
||||
|
||||
do {
|
||||
/* Initialize mailbox message. */
|
||||
mbox_msg = 0x00;
|
||||
avail_emptybuff = 0;
|
||||
|
||||
spin_lock_irqsave(&pshm_drv->lock, flags);
|
||||
|
||||
/* Check for pending receive buffers. */
|
||||
if (!list_empty(&pshm_drv->rx_pend_list)) {
|
||||
|
||||
pbuf = list_entry(pshm_drv->rx_pend_list.next,
|
||||
struct buf_list, list);
|
||||
|
||||
list_del_init(&pbuf->list);
|
||||
list_add_tail(&pbuf->list, &pshm_drv->rx_empty_list);
|
||||
/*
|
||||
* Value index is never changed,
|
||||
* so read access should be safe.
|
||||
*/
|
||||
mbox_msg |= SHM_SET_EMPTY(pbuf->index);
|
||||
}
|
||||
|
||||
skb = skb_peek(&pshm_drv->sk_qhead);
|
||||
|
||||
if (skb == NULL)
|
||||
goto send_msg;
|
||||
/* Check the available no. of buffers in the empty list */
|
||||
list_for_each(pos, &pshm_drv->tx_empty_list)
|
||||
avail_emptybuff++;
|
||||
|
||||
if ((avail_emptybuff < LOW_WATERMARK) &&
|
||||
pshm_drv->tx_empty_available) {
|
||||
/* Update blocking condition. */
|
||||
pshm_drv->tx_empty_available = 0;
|
||||
spin_unlock_irqrestore(&pshm_drv->lock, flags);
|
||||
pshm_drv->cfdev.flowctrl
|
||||
(pshm_drv->pshm_dev->pshm_netdev,
|
||||
CAIF_FLOW_OFF);
|
||||
spin_lock_irqsave(&pshm_drv->lock, flags);
|
||||
}
|
||||
/*
|
||||
* We simply return back to the caller if we do not have space
|
||||
* either in Tx pending list or Tx empty list. In this case,
|
||||
* we hold the received skb in the skb list, waiting to
|
||||
* be transmitted once Tx buffers become available
|
||||
*/
|
||||
if (list_empty(&pshm_drv->tx_empty_list))
|
||||
goto send_msg;
|
||||
|
||||
/* Get the first free Tx buffer. */
|
||||
pbuf = list_entry(pshm_drv->tx_empty_list.next,
|
||||
struct buf_list, list);
|
||||
do {
|
||||
if (append) {
|
||||
skb = skb_peek(&pshm_drv->sk_qhead);
|
||||
if (skb == NULL)
|
||||
break;
|
||||
}
|
||||
|
||||
frm = (struct shm_caif_frm *)
|
||||
(pbuf->desc_vptr + pbuf->frm_ofs);
|
||||
|
||||
frm->hdr_ofs = 0;
|
||||
frmlen = 0;
|
||||
frmlen += SHM_HDR_LEN + frm->hdr_ofs + skb->len;
|
||||
|
||||
/* Add tail padding if needed. */
|
||||
if (frmlen % SHM_FRM_PAD_LEN)
|
||||
frmlen += SHM_FRM_PAD_LEN -
|
||||
(frmlen % SHM_FRM_PAD_LEN);
|
||||
|
||||
/*
|
||||
* Verify that packet, header and additional padding
|
||||
* can fit within the buffer frame area.
|
||||
*/
|
||||
if (frmlen >= (pbuf->len - pbuf->frm_ofs))
|
||||
break;
|
||||
|
||||
if (!append) {
|
||||
list_del_init(&pbuf->list);
|
||||
append = 1;
|
||||
}
|
||||
|
||||
skb = skb_dequeue(&pshm_drv->sk_qhead);
|
||||
if (skb == NULL)
|
||||
break;
|
||||
/* Copy in CAIF frame. */
|
||||
skb_copy_bits(skb, 0, pbuf->desc_vptr +
|
||||
pbuf->frm_ofs + SHM_HDR_LEN +
|
||||
frm->hdr_ofs, skb->len);
|
||||
|
||||
pshm_drv->pshm_dev->pshm_netdev->stats.tx_packets++;
|
||||
pshm_drv->pshm_dev->pshm_netdev->stats.tx_bytes +=
|
||||
frmlen;
|
||||
dev_kfree_skb_irq(skb);
|
||||
|
||||
/* Fill in the shared memory packet descriptor area. */
|
||||
pck_desc = (struct shm_pck_desc *) (pbuf->desc_vptr);
|
||||
/* Forward to current frame. */
|
||||
pck_desc += pbuf->frames;
|
||||
pck_desc->frm_ofs = (pbuf->phy_addr -
|
||||
pshm_drv->shm_base_addr) +
|
||||
pbuf->frm_ofs;
|
||||
pck_desc->frm_len = frmlen;
|
||||
/* Terminate packet descriptor area. */
|
||||
pck_desc++;
|
||||
pck_desc->frm_ofs = 0;
|
||||
/* Update buffer parameters. */
|
||||
pbuf->frames++;
|
||||
pbuf->frm_ofs += frmlen + (frmlen % 32);
|
||||
|
||||
} while (pbuf->frames < SHM_MAX_FRMS_PER_BUF);
|
||||
|
||||
/* Assign buffer as full. */
|
||||
list_add_tail(&pbuf->list, &pshm_drv->tx_full_list);
|
||||
append = 0;
|
||||
mbox_msg |= SHM_SET_FULL(pbuf->index);
|
||||
send_msg:
|
||||
spin_unlock_irqrestore(&pshm_drv->lock, flags);
|
||||
|
||||
if (mbox_msg)
|
||||
pshm_drv->pshm_dev->pshmdev_mbxsend
|
||||
(pshm_drv->pshm_dev->shm_id, mbox_msg);
|
||||
} while (mbox_msg);
|
||||
}
|
||||
|
||||
static int shm_netdev_tx(struct sk_buff *skb, struct net_device *shm_netdev)
|
||||
{
|
||||
struct shmdrv_layer *pshm_drv;
|
||||
|
||||
pshm_drv = netdev_priv(shm_netdev);
|
||||
|
||||
skb_queue_tail(&pshm_drv->sk_qhead, skb);
|
||||
|
||||
/* Schedule Tx work queue. for deferred processing of skbs*/
|
||||
if (!work_pending(&pshm_drv->shm_tx_work))
|
||||
queue_work(pshm_drv->pshm_tx_workqueue, &pshm_drv->shm_tx_work);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct net_device_ops netdev_ops = {
|
||||
.ndo_open = shm_netdev_open,
|
||||
.ndo_stop = shm_netdev_close,
|
||||
.ndo_start_xmit = shm_netdev_tx,
|
||||
};
|
||||
|
||||
static void shm_netdev_setup(struct net_device *pshm_netdev)
|
||||
{
|
||||
struct shmdrv_layer *pshm_drv;
|
||||
pshm_netdev->netdev_ops = &netdev_ops;
|
||||
|
||||
pshm_netdev->mtu = CAIF_MAX_MTU;
|
||||
pshm_netdev->type = ARPHRD_CAIF;
|
||||
pshm_netdev->hard_header_len = CAIF_NEEDED_HEADROOM;
|
||||
pshm_netdev->tx_queue_len = 0;
|
||||
pshm_netdev->destructor = free_netdev;
|
||||
|
||||
pshm_drv = netdev_priv(pshm_netdev);
|
||||
|
||||
/* Initialize structures in a clean state. */
|
||||
memset(pshm_drv, 0, sizeof(struct shmdrv_layer));
|
||||
|
||||
pshm_drv->cfdev.link_select = CAIF_LINK_LOW_LATENCY;
|
||||
}
|
||||
|
||||
int caif_shmcore_probe(struct shmdev_layer *pshm_dev)
|
||||
{
|
||||
int result, j;
|
||||
struct shmdrv_layer *pshm_drv = NULL;
|
||||
|
||||
pshm_dev->pshm_netdev = alloc_netdev(sizeof(struct shmdrv_layer),
|
||||
"cfshm%d", shm_netdev_setup);
|
||||
if (!pshm_dev->pshm_netdev)
|
||||
return -ENOMEM;
|
||||
|
||||
pshm_drv = netdev_priv(pshm_dev->pshm_netdev);
|
||||
pshm_drv->pshm_dev = pshm_dev;
|
||||
|
||||
/*
|
||||
* Initialization starts with the verification of the
|
||||
* availability of MBX driver by calling its setup function.
|
||||
* MBX driver must be available by this time for proper
|
||||
* functioning of SHM driver.
|
||||
*/
|
||||
if ((pshm_dev->pshmdev_mbxsetup
|
||||
(caif_shmdrv_rx_cb, pshm_dev, pshm_drv)) != 0) {
|
||||
pr_warn("Could not config. SHM Mailbox,"
|
||||
" Bailing out.....\n");
|
||||
free_netdev(pshm_dev->pshm_netdev);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
skb_queue_head_init(&pshm_drv->sk_qhead);
|
||||
|
||||
pr_info("SHM DEVICE[%d] PROBED BY DRIVER, NEW SHM DRIVER"
|
||||
" INSTANCE AT pshm_drv =0x%p\n",
|
||||
pshm_drv->pshm_dev->shm_id, pshm_drv);
|
||||
|
||||
if (pshm_dev->shm_total_sz <
|
||||
(NR_TX_BUF * TX_BUF_SZ + NR_RX_BUF * RX_BUF_SZ)) {
|
||||
|
||||
pr_warn("ERROR, Amount of available"
|
||||
" Phys. SHM cannot accommodate current SHM "
|
||||
"driver configuration, Bailing out ...\n");
|
||||
free_netdev(pshm_dev->pshm_netdev);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
pshm_drv->shm_base_addr = pshm_dev->shm_base_addr;
|
||||
pshm_drv->shm_tx_addr = pshm_drv->shm_base_addr;
|
||||
|
||||
if (pshm_dev->shm_loopback)
|
||||
pshm_drv->shm_rx_addr = pshm_drv->shm_tx_addr;
|
||||
else
|
||||
pshm_drv->shm_rx_addr = pshm_dev->shm_base_addr +
|
||||
(NR_TX_BUF * TX_BUF_SZ);
|
||||
|
||||
spin_lock_init(&pshm_drv->lock);
|
||||
INIT_LIST_HEAD(&pshm_drv->tx_empty_list);
|
||||
INIT_LIST_HEAD(&pshm_drv->tx_pend_list);
|
||||
INIT_LIST_HEAD(&pshm_drv->tx_full_list);
|
||||
|
||||
INIT_LIST_HEAD(&pshm_drv->rx_empty_list);
|
||||
INIT_LIST_HEAD(&pshm_drv->rx_pend_list);
|
||||
INIT_LIST_HEAD(&pshm_drv->rx_full_list);
|
||||
|
||||
INIT_WORK(&pshm_drv->shm_tx_work, shm_tx_work_func);
|
||||
INIT_WORK(&pshm_drv->shm_rx_work, shm_rx_work_func);
|
||||
|
||||
pshm_drv->pshm_tx_workqueue =
|
||||
create_singlethread_workqueue("shm_tx_work");
|
||||
pshm_drv->pshm_rx_workqueue =
|
||||
create_singlethread_workqueue("shm_rx_work");
|
||||
|
||||
for (j = 0; j < NR_TX_BUF; j++) {
|
||||
struct buf_list *tx_buf =
|
||||
kmalloc(sizeof(struct buf_list), GFP_KERNEL);
|
||||
|
||||
if (tx_buf == NULL) {
|
||||
free_netdev(pshm_dev->pshm_netdev);
|
||||
return -ENOMEM;
|
||||
}
|
||||
tx_buf->index = j;
|
||||
tx_buf->phy_addr = pshm_drv->shm_tx_addr + (TX_BUF_SZ * j);
|
||||
tx_buf->len = TX_BUF_SZ;
|
||||
tx_buf->frames = 0;
|
||||
tx_buf->frm_ofs = SHM_CAIF_FRM_OFS;
|
||||
|
||||
if (pshm_dev->shm_loopback)
|
||||
tx_buf->desc_vptr = (unsigned char *)tx_buf->phy_addr;
|
||||
else
|
||||
/*
|
||||
* FIXME: the result of ioremap is not a pointer - arnd
|
||||
*/
|
||||
tx_buf->desc_vptr =
|
||||
ioremap(tx_buf->phy_addr, TX_BUF_SZ);
|
||||
|
||||
list_add_tail(&tx_buf->list, &pshm_drv->tx_empty_list);
|
||||
}
|
||||
|
||||
for (j = 0; j < NR_RX_BUF; j++) {
|
||||
struct buf_list *rx_buf =
|
||||
kmalloc(sizeof(struct buf_list), GFP_KERNEL);
|
||||
|
||||
if (rx_buf == NULL) {
|
||||
free_netdev(pshm_dev->pshm_netdev);
|
||||
return -ENOMEM;
|
||||
}
|
||||
rx_buf->index = j;
|
||||
rx_buf->phy_addr = pshm_drv->shm_rx_addr + (RX_BUF_SZ * j);
|
||||
rx_buf->len = RX_BUF_SZ;
|
||||
|
||||
if (pshm_dev->shm_loopback)
|
||||
rx_buf->desc_vptr = (unsigned char *)rx_buf->phy_addr;
|
||||
else
|
||||
rx_buf->desc_vptr =
|
||||
ioremap(rx_buf->phy_addr, RX_BUF_SZ);
|
||||
list_add_tail(&rx_buf->list, &pshm_drv->rx_empty_list);
|
||||
}
|
||||
|
||||
pshm_drv->tx_empty_available = 1;
|
||||
result = register_netdev(pshm_dev->pshm_netdev);
|
||||
if (result)
|
||||
pr_warn("ERROR[%d], SHM could not, "
|
||||
"register with NW FRMWK Bailing out ...\n", result);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
void caif_shmcore_remove(struct net_device *pshm_netdev)
|
||||
{
|
||||
struct buf_list *pbuf;
|
||||
struct shmdrv_layer *pshm_drv = NULL;
|
||||
|
||||
pshm_drv = netdev_priv(pshm_netdev);
|
||||
|
||||
while (!(list_empty(&pshm_drv->tx_pend_list))) {
|
||||
pbuf =
|
||||
list_entry(pshm_drv->tx_pend_list.next,
|
||||
struct buf_list, list);
|
||||
|
||||
list_del(&pbuf->list);
|
||||
kfree(pbuf);
|
||||
}
|
||||
|
||||
while (!(list_empty(&pshm_drv->tx_full_list))) {
|
||||
pbuf =
|
||||
list_entry(pshm_drv->tx_full_list.next,
|
||||
struct buf_list, list);
|
||||
list_del(&pbuf->list);
|
||||
kfree(pbuf);
|
||||
}
|
||||
|
||||
while (!(list_empty(&pshm_drv->tx_empty_list))) {
|
||||
pbuf =
|
||||
list_entry(pshm_drv->tx_empty_list.next,
|
||||
struct buf_list, list);
|
||||
list_del(&pbuf->list);
|
||||
kfree(pbuf);
|
||||
}
|
||||
|
||||
while (!(list_empty(&pshm_drv->rx_full_list))) {
|
||||
pbuf =
|
||||
list_entry(pshm_drv->tx_full_list.next,
|
||||
struct buf_list, list);
|
||||
list_del(&pbuf->list);
|
||||
kfree(pbuf);
|
||||
}
|
||||
|
||||
while (!(list_empty(&pshm_drv->rx_pend_list))) {
|
||||
pbuf =
|
||||
list_entry(pshm_drv->tx_pend_list.next,
|
||||
struct buf_list, list);
|
||||
list_del(&pbuf->list);
|
||||
kfree(pbuf);
|
||||
}
|
||||
|
||||
while (!(list_empty(&pshm_drv->rx_empty_list))) {
|
||||
pbuf =
|
||||
list_entry(pshm_drv->rx_empty_list.next,
|
||||
struct buf_list, list);
|
||||
list_del(&pbuf->list);
|
||||
kfree(pbuf);
|
||||
}
|
||||
|
||||
/* Destroy work queues. */
|
||||
destroy_workqueue(pshm_drv->pshm_tx_workqueue);
|
||||
destroy_workqueue(pshm_drv->pshm_rx_workqueue);
|
||||
|
||||
unregister_netdev(pshm_netdev);
|
||||
}
|
|
@ -1,26 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson AB 2010
|
||||
* Contact: Sjur Brendeland / sjur.brandeland@stericsson.com
|
||||
* Author: Amarnath Revanna / amarnath.bangalore.revanna@stericsson.com
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#ifndef CAIF_SHM_H_
|
||||
#define CAIF_SHM_H_
|
||||
|
||||
struct shmdev_layer {
|
||||
u32 shm_base_addr;
|
||||
u32 shm_total_sz;
|
||||
u32 shm_id;
|
||||
u32 shm_loopback;
|
||||
void *hmbx;
|
||||
int (*pshmdev_mbxsend) (u32 shm_id, u32 mbx_msg);
|
||||
int (*pshmdev_mbxsetup) (void *pshmdrv_cb,
|
||||
struct shmdev_layer *pshm_dev, void *pshm_drv);
|
||||
struct net_device *pshm_netdev;
|
||||
};
|
||||
|
||||
extern int caif_shmcore_probe(struct shmdev_layer *pshm_dev);
|
||||
extern void caif_shmcore_remove(struct net_device *pshm_netdev);
|
||||
|
||||
#endif
|
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Reference in New Issue