Merge tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper, mvebu fixes for v3.10 (round 2): - mvebu (and orion SoCs) - remove init_dma_coherent_pool_size() - mvebu - fix ranges DT property - fix DT reg value for L2 cache - select ARCH_REQUIRE_GPIOLIB - orion legacy - fix num_resources and id for ge10 and ge11 * tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux: ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node ARM: plat-orion: Fix num_resources and id for ge10 and ge11 arm: mvebu: fix the 'ranges' property to handle PCIe ARM: mvebu: select ARCH_REQUIRE_GPIOLIB for mvebu platform ARM: mvebu: Fix ranges entry on XP GP board ARM: Orion: Remove redundant init_dma_coherent_pool_size() Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
7a7e3472dc
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@ -33,7 +33,8 @@
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&mpic>;
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ranges = <0 0 0xd0000000 0x100000>;
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ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
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0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
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internal-regs {
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compatible = "simple-bus";
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@ -29,7 +29,8 @@
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};
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soc {
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ranges = <0 0xd0000000 0x100000>;
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ranges = <0 0xd0000000 0x0100000 /* internal registers */
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0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
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internal-regs {
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system-controller@18200 {
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compatible = "marvell,armada-370-xp-system-controller";
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@ -38,7 +39,7 @@
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L2: l2-cache {
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compatible = "marvell,aurora-outer-cache";
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reg = <0xd0008000 0x1000>;
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reg = <0x08000 0x1000>;
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cache-id-part = <0x100>;
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wt-override;
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};
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@ -39,6 +39,9 @@
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};
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soc {
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ranges = <0 0 0xd0000000 0x100000
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0xf0000000 0 0xf0000000 0x1000000>;
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internal-regs {
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serial@12000 {
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clock-frequency = <250000000>;
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@ -528,12 +528,6 @@ void __init kirkwood_init_early(void)
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{
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orion_time_set_base(TIMER_VIRT_BASE);
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/*
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* Some Kirkwood devices allocate their coherent buffers from atomic
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* context. Increase size of atomic coherent pool to make sure such
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* the allocations won't fail.
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*/
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init_dma_coherent_pool_size(SZ_1M);
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mvebu_mbus_init("marvell,kirkwood-mbus",
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BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
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DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);
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@ -15,6 +15,7 @@ config ARCH_MVEBU
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select MVEBU_CLK_GATING
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select MVEBU_MBUS
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select ZONE_DMA if ARM_LPAE
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select ARCH_REQUIRE_GPIOLIB
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if ARCH_MVEBU
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@ -53,13 +53,6 @@ void __init armada_370_xp_init_early(void)
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{
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char *mbus_soc_name;
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/*
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* Some Armada 370/XP devices allocate their coherent buffers
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* from atomic context. Increase size of atomic coherent pool
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* to make sure such the allocations won't fail.
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*/
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init_dma_coherent_pool_size(SZ_1M);
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/*
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* This initialization will be replaced by a DT-based
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* initialization once the mvebu-mbus driver gains DT support.
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@ -199,13 +199,6 @@ void __init orion5x_init_early(void)
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orion_time_set_base(TIMER_VIRT_BASE);
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/*
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* Some Orion5x devices allocate their coherent buffers from atomic
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* context. Increase size of atomic coherent pool to make sure such
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* the allocations won't fail.
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*/
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init_dma_coherent_pool_size(SZ_1M);
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/* Initialize the MBUS driver */
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orion5x_pcie_id(&dev, &rev);
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if (dev == MV88F5281_DEV_ID)
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@ -383,7 +383,7 @@ static struct resource orion_ge10_shared_resources[] = {
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static struct platform_device orion_ge10_shared = {
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.name = MV643XX_ETH_SHARED_NAME,
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.id = 1,
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.id = 2,
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.dev = {
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.platform_data = &orion_ge10_shared_data,
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},
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@ -398,8 +398,8 @@ static struct resource orion_ge10_resources[] = {
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static struct platform_device orion_ge10 = {
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.name = MV643XX_ETH_NAME,
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.id = 1,
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.num_resources = 2,
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.id = 2,
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.num_resources = 1,
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.resource = orion_ge10_resources,
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.dev = {
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.coherent_dma_mask = DMA_BIT_MASK(32),
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@ -432,7 +432,7 @@ static struct resource orion_ge11_shared_resources[] = {
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static struct platform_device orion_ge11_shared = {
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.name = MV643XX_ETH_SHARED_NAME,
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.id = 1,
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.id = 3,
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.dev = {
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.platform_data = &orion_ge11_shared_data,
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},
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@ -447,8 +447,8 @@ static struct resource orion_ge11_resources[] = {
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static struct platform_device orion_ge11 = {
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.name = MV643XX_ETH_NAME,
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.id = 1,
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.num_resources = 2,
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.id = 3,
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.num_resources = 1,
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.resource = orion_ge11_resources,
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.dev = {
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.coherent_dma_mask = DMA_BIT_MASK(32),
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