Merge tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux into fixes

From Jason Cooper, mvebu fixes for v3.10 (round 2):
 - mvebu (and orion SoCs)
    - remove init_dma_coherent_pool_size()
 - mvebu
    - fix ranges DT property
    - fix DT reg value for L2 cache
    - select ARCH_REQUIRE_GPIOLIB
 - orion legacy
    - fix num_resources and id for ge10 and ge11

* tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux:
  ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node
  ARM: plat-orion: Fix num_resources and id for ge10 and ge11
  arm: mvebu: fix the 'ranges' property to handle PCIe
  ARM: mvebu: select ARCH_REQUIRE_GPIOLIB for mvebu platform
  ARM: mvebu: Fix ranges entry on XP GP board
  ARM: Orion: Remove redundant init_dma_coherent_pool_size()

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-05-20 23:41:04 -07:00
commit 7a7e3472dc
8 changed files with 15 additions and 29 deletions

View File

@ -33,7 +33,8 @@
#size-cells = <1>; #size-cells = <1>;
compatible = "simple-bus"; compatible = "simple-bus";
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
ranges = <0 0 0xd0000000 0x100000>; ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
internal-regs { internal-regs {
compatible = "simple-bus"; compatible = "simple-bus";

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@ -29,7 +29,8 @@
}; };
soc { soc {
ranges = <0 0xd0000000 0x100000>; ranges = <0 0xd0000000 0x0100000 /* internal registers */
0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
internal-regs { internal-regs {
system-controller@18200 { system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller"; compatible = "marvell,armada-370-xp-system-controller";
@ -38,7 +39,7 @@
L2: l2-cache { L2: l2-cache {
compatible = "marvell,aurora-outer-cache"; compatible = "marvell,aurora-outer-cache";
reg = <0xd0008000 0x1000>; reg = <0x08000 0x1000>;
cache-id-part = <0x100>; cache-id-part = <0x100>;
wt-override; wt-override;
}; };

View File

@ -39,6 +39,9 @@
}; };
soc { soc {
ranges = <0 0 0xd0000000 0x100000
0xf0000000 0 0xf0000000 0x1000000>;
internal-regs { internal-regs {
serial@12000 { serial@12000 {
clock-frequency = <250000000>; clock-frequency = <250000000>;

View File

@ -528,12 +528,6 @@ void __init kirkwood_init_early(void)
{ {
orion_time_set_base(TIMER_VIRT_BASE); orion_time_set_base(TIMER_VIRT_BASE);
/*
* Some Kirkwood devices allocate their coherent buffers from atomic
* context. Increase size of atomic coherent pool to make sure such
* the allocations won't fail.
*/
init_dma_coherent_pool_size(SZ_1M);
mvebu_mbus_init("marvell,kirkwood-mbus", mvebu_mbus_init("marvell,kirkwood-mbus",
BRIDGE_WINS_BASE, BRIDGE_WINS_SZ, BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ); DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);

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@ -15,6 +15,7 @@ config ARCH_MVEBU
select MVEBU_CLK_GATING select MVEBU_CLK_GATING
select MVEBU_MBUS select MVEBU_MBUS
select ZONE_DMA if ARM_LPAE select ZONE_DMA if ARM_LPAE
select ARCH_REQUIRE_GPIOLIB
if ARCH_MVEBU if ARCH_MVEBU

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@ -53,13 +53,6 @@ void __init armada_370_xp_init_early(void)
{ {
char *mbus_soc_name; char *mbus_soc_name;
/*
* Some Armada 370/XP devices allocate their coherent buffers
* from atomic context. Increase size of atomic coherent pool
* to make sure such the allocations won't fail.
*/
init_dma_coherent_pool_size(SZ_1M);
/* /*
* This initialization will be replaced by a DT-based * This initialization will be replaced by a DT-based
* initialization once the mvebu-mbus driver gains DT support. * initialization once the mvebu-mbus driver gains DT support.

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@ -199,13 +199,6 @@ void __init orion5x_init_early(void)
orion_time_set_base(TIMER_VIRT_BASE); orion_time_set_base(TIMER_VIRT_BASE);
/*
* Some Orion5x devices allocate their coherent buffers from atomic
* context. Increase size of atomic coherent pool to make sure such
* the allocations won't fail.
*/
init_dma_coherent_pool_size(SZ_1M);
/* Initialize the MBUS driver */ /* Initialize the MBUS driver */
orion5x_pcie_id(&dev, &rev); orion5x_pcie_id(&dev, &rev);
if (dev == MV88F5281_DEV_ID) if (dev == MV88F5281_DEV_ID)

View File

@ -383,7 +383,7 @@ static struct resource orion_ge10_shared_resources[] = {
static struct platform_device orion_ge10_shared = { static struct platform_device orion_ge10_shared = {
.name = MV643XX_ETH_SHARED_NAME, .name = MV643XX_ETH_SHARED_NAME,
.id = 1, .id = 2,
.dev = { .dev = {
.platform_data = &orion_ge10_shared_data, .platform_data = &orion_ge10_shared_data,
}, },
@ -398,8 +398,8 @@ static struct resource orion_ge10_resources[] = {
static struct platform_device orion_ge10 = { static struct platform_device orion_ge10 = {
.name = MV643XX_ETH_NAME, .name = MV643XX_ETH_NAME,
.id = 1, .id = 2,
.num_resources = 2, .num_resources = 1,
.resource = orion_ge10_resources, .resource = orion_ge10_resources,
.dev = { .dev = {
.coherent_dma_mask = DMA_BIT_MASK(32), .coherent_dma_mask = DMA_BIT_MASK(32),
@ -432,7 +432,7 @@ static struct resource orion_ge11_shared_resources[] = {
static struct platform_device orion_ge11_shared = { static struct platform_device orion_ge11_shared = {
.name = MV643XX_ETH_SHARED_NAME, .name = MV643XX_ETH_SHARED_NAME,
.id = 1, .id = 3,
.dev = { .dev = {
.platform_data = &orion_ge11_shared_data, .platform_data = &orion_ge11_shared_data,
}, },
@ -447,8 +447,8 @@ static struct resource orion_ge11_resources[] = {
static struct platform_device orion_ge11 = { static struct platform_device orion_ge11 = {
.name = MV643XX_ETH_NAME, .name = MV643XX_ETH_NAME,
.id = 1, .id = 3,
.num_resources = 2, .num_resources = 1,
.resource = orion_ge11_resources, .resource = orion_ge11_resources,
.dev = { .dev = {
.coherent_dma_mask = DMA_BIT_MASK(32), .coherent_dma_mask = DMA_BIT_MASK(32),