ARM: tegra: second round of device tree changes
This branch includes some late device tree changes for Tegra: A property is added to Whistler's device tree to enable the PMIC to act as the pm_power_off() implementation. A number of new device tree are added for boards from Avionic Design. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJQWzknAAoJEMzrak5tbycx5xgP+gMwuLEEd9YFTm8s2lpco8F8 k6hDy/5a7LSgmYgrVa8U7dooQSZyDQE8/Arfzw/uXKbhHY77+B06aqz6doCLjQ2s UZp9TGqS9rFcItNipeYbqxKMU0QYzHAX+ZCgld2Sq9TI9STCJjmB1Rhb9zmcr+zv kYGp73b8fjDI/44bRGsF3AOwKjQjB4hmAyFY+ybjUENFU7pFIR1V1bGsczhDvwzs Bp2JilSKPrS9kf+pzMDWON8/0HHoKnKfLE/Cx7iwYbKgt9Czl4wUUqeFzNI5CCnw /FquASmefo3JUPRR2Q7A8IwCF6YksJCDO6nQSa6wD0k4tuC/5qHm7x+pZkWDZwBM iWovqYFEMgN1rhzdxb6BJVt3I6zVSzkhF8+gcw5rRSakZgKSVsJqsNU20hrkRx5A mW0F2vCwEzKZa2v9wHpqJ7YjJdr4X6ISKWbipDmmTXxBBUyXIpJTSjkTd969J9iQ XFvPK3VI4LRgw/Nu5qMbPIyIIbGWLkIY6dKJNOHY1aDZGuntDqVWen4OTrX57S/E XC00MR7WAZtLbternGj6WA6UiyuYU+JQ825CfLs8PS5a9+xLSntyaPeQtMkEpz6p 7kDBSBOBg9O5KxgJNT/6ufk7qogWpe461OyQsAt6BHfmjXStQM0ZN2DmZhaYaqkm hxGAq/7/0F1R7kUvyw3j =s7Ln -----END PGP SIGNATURE----- Merge tag 'tegra-for-3.7-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt ARM: tegra: second round of device tree changes This branch includes some late device tree changes for Tegra: A property is added to Whistler's device tree to enable the PMIC to act as the pm_power_off() implementation. A number of new device tree are added for boards from Avionic Design. * tag 'tegra-for-3.7-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support ARM: tegra: Add Avionic Design Medcom-Wide support ARM: tegra: Add Avionic Design Plutux support ARM: tegra: Add Avionic Design Tamonten support ARM: tegra: dts: Add pwm label ARM: dt: tegra: whistler: configure power off
This commit is contained in:
Olof Johansson
commit
7a5551c727
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@ -0,0 +1,58 @@
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|||
/dts-v1/;
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||||
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||||
/include/ "tegra20-tamonten.dtsi"
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||||
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||||
/ {
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||||
model = "Avionic Design Medcom-Wide board";
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||||
compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
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||||
|
||||
i2c@7000c000 {
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||||
wm8903: wm8903@1a {
|
||||
compatible = "wlf,wm8903";
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||||
reg = <0x1a>;
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||||
interrupt-parent = <&gpio>;
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||||
interrupts = <187 0x04>;
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||||
|
||||
gpio-controller;
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||||
#gpio-cells = <2>;
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||||
|
||||
micdet-cfg = <0>;
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||||
micdet-delay = <100>;
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||||
gpio-cfg = <0xffffffff
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||||
0xffffffff
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||||
0
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||||
0xffffffff
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||||
0xffffffff>;
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||||
};
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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sound {
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compatible = "ad,tegra-audio-wm8903-medcom-wide",
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"nvidia,tegra-audio-wm8903";
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nvidia,model = "Avionic Design Medcom-Wide";
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nvidia,audio-routing =
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"Headphone Jack", "HPOUTR",
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"Headphone Jack", "HPOUTL",
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"Int Spk", "ROP",
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"Int Spk", "RON",
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"Int Spk", "LOP",
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"Int Spk", "LON",
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"Mic Jack", "MICBIAS",
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"IN1L", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&wm8903>;
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nvidia,spkr-en-gpios = <&wm8903 2 0>;
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nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
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};
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};
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@ -0,0 +1,50 @@
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/dts-v1/;
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/include/ "tegra20-tamonten.dtsi"
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/ {
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model = "Avionic Design Plutux board";
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compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20";
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i2c@7000c000 {
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
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interrupts = <187 0x04>;
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = <0xffffffff
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0xffffffff
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0
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0xffffffff
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0xffffffff>;
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||||
};
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};
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sound {
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compatible = "ad,tegra-audio-plutux",
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"nvidia,tegra-audio-wm8903";
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nvidia,model = "Avionic Design Plutux";
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nvidia,audio-routing =
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"Headphone Jack", "HPOUTR",
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"Headphone Jack", "HPOUTL",
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"Int Spk", "ROP",
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"Int Spk", "RON",
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"Int Spk", "LOP",
|
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"Int Spk", "LON",
|
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"Mic Jack", "MICBIAS",
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"IN1L", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&wm8903>;
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nvidia,spkr-en-gpios = <&wm8903 2 0>;
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nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
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};
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};
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@ -0,0 +1,449 @@
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/include/ "tegra20.dtsi"
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/ {
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model = "Avionic Design Tamonten SOM";
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compatible = "ad,tamonten", "nvidia,tegra20";
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||||
|
||||
memory {
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||||
reg = <0x00000000 0x20000000>;
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};
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|
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pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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|
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state_default: pinmux {
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ata {
|
||||
nvidia,pins = "ata";
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nvidia,function = "ide";
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||||
};
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atb {
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||||
nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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||||
};
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atc {
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nvidia,pins = "atc";
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nvidia,function = "nand";
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};
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||||
atd {
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||||
nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
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"spia", "spib", "spic";
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nvidia,function = "gmi";
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||||
};
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||||
cdev1 {
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||||
nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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||||
nvidia,pins = "cdev2";
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||||
nvidia,function = "pllp_out4";
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||||
};
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||||
crtp {
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||||
nvidia,pins = "crtp";
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nvidia,function = "crt";
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||||
};
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||||
csus {
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||||
nvidia,pins = "csus";
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||||
nvidia,function = "vi_sensor_clk";
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||||
};
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||||
dap1 {
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||||
nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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||||
};
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||||
ddc {
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||||
nvidia,pins = "ddc";
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nvidia,function = "i2c2";
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||||
};
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dta {
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nvidia,pins = "dta", "dtd";
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nvidia,function = "sdio2";
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||||
};
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dtb {
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nvidia,pins = "dtb", "dtc", "dte";
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nvidia,function = "rsvd1";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gmc {
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nvidia,pins = "gmc";
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nvidia,function = "uartd";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv", "slxa", "slxk";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint", "pta";
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uarta";
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};
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kbca {
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nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
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"kbce", "kbcf";
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nvidia,function = "kbc";
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};
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lcsn {
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nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
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"ld3", "ld4", "ld5", "ld6", "ld7",
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"ld8", "ld9", "ld10", "ld11", "ld12",
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"ld13", "ld14", "ld15", "ld16", "ld17",
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"ldc", "ldi", "lhp0", "lhp1", "lhp2",
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"lhs", "lm0", "lm1", "lpp", "lpw0",
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"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
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"lsda", "lsdi", "lspi", "lvp0", "lvp1",
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"lvs";
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nvidia,function = "displaya";
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};
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owc {
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nvidia,pins = "owc", "spdi", "spdo", "uac";
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nvidia,function = "rsvd2";
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdb {
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nvidia,pins = "sdb", "sdc", "sdd";
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nvidia,function = "pwm";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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slxc {
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nvidia,pins = "slxc", "slxd";
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nvidia,function = "spdif";
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};
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spid {
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nvidia,pins = "spid", "spie", "spif";
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nvidia,function = "spi1";
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};
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spig {
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nvidia,pins = "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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uaa {
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nvidia,pins = "uaa", "uab", "uda";
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nvidia,function = "ulpi";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "atd", "ate",
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"cdev1", "cdev2", "dap1", "dtb", "gma",
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"gmb", "gmc", "gmd", "gme", "gpu7",
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"gpv", "i2cp", "pta", "rm", "slxa",
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"slxk", "spia", "spib", "uac";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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conf_ck32 {
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nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
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nvidia,pull = <0>;
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||||
};
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||||
conf_csus {
|
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nvidia,pins = "csus", "spid", "spif";
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nvidia,pull = <1>;
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nvidia,tristate = <1>;
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};
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conf_crtp {
|
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nvidia,pins = "crtp", "dap2", "dap3", "dap4",
|
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"dtc", "dte", "dtf", "gpu", "sdio1",
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"slxc", "slxd", "spdi", "spdo", "spig",
|
||||
"uda";
|
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nvidia,pull = <0>;
|
||||
nvidia,tristate = <1>;
|
||||
};
|
||||
conf_ddc {
|
||||
nvidia,pins = "ddc", "dta", "dtd", "kbca",
|
||||
"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
|
||||
"sdc";
|
||||
nvidia,pull = <2>;
|
||||
nvidia,tristate = <0>;
|
||||
};
|
||||
conf_hdint {
|
||||
nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
|
||||
"lpw1", "lsc1", "lsck", "lsda", "lsdi",
|
||||
"lvp0", "owc", "sdb";
|
||||
nvidia,tristate = <1>;
|
||||
};
|
||||
conf_irrx {
|
||||
nvidia,pins = "irrx", "irtx", "sdd", "spic",
|
||||
"spie", "spih", "uaa", "uab", "uad",
|
||||
"uca", "ucb";
|
||||
nvidia,pull = <2>;
|
||||
nvidia,tristate = <1>;
|
||||
};
|
||||
conf_lc {
|
||||
nvidia,pins = "lc", "ls";
|
||||
nvidia,pull = <2>;
|
||||
};
|
||||
conf_ld0 {
|
||||
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
|
||||
"ld5", "ld6", "ld7", "ld8", "ld9",
|
||||
"ld10", "ld11", "ld12", "ld13", "ld14",
|
||||
"ld15", "ld16", "ld17", "ldi", "lhp0",
|
||||
"lhp1", "lhp2", "lhs", "lm0", "lpp",
|
||||
"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
|
||||
"lvs", "pmc";
|
||||
nvidia,tristate = <0>;
|
||||
};
|
||||
conf_ld17_0 {
|
||||
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
|
||||
"ld23_22";
|
||||
nvidia,pull = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s@70002800 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@70006300 {
|
||||
clock-frequency = <216000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c@7000c000 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c@7000d000 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
pmic: tps6586x@34 {
|
||||
compatible = "ti,tps6586x";
|
||||
reg = <0x34>;
|
||||
interrupts = <0 86 0x4>;
|
||||
|
||||
ti,system-power-controller;
|
||||
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
|
||||
sys-supply = <&vdd_5v0_reg>;
|
||||
vin-sm0-supply = <&sys_reg>;
|
||||
vin-sm1-supply = <&sys_reg>;
|
||||
vin-sm2-supply = <&sys_reg>;
|
||||
vinldo01-supply = <&sm2_reg>;
|
||||
vinldo23-supply = <&sm2_reg>;
|
||||
vinldo4-supply = <&sm2_reg>;
|
||||
vinldo678-supply = <&sm2_reg>;
|
||||
vinldo9-supply = <&sm2_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sys_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "sys";
|
||||
regulator-name = "vdd_sys";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sm0";
|
||||
regulator-name = "vdd_sys_sm0,vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sm1";
|
||||
regulator-name = "vdd_sys_sm1,vdd_cpu";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm2_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "sm2";
|
||||
regulator-name = "vdd_sys_sm2,vin_ldo*";
|
||||
regulator-min-microvolt = <3700000>;
|
||||
regulator-max-microvolt = <3700000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo0";
|
||||
regulator-name = "vdd_ldo0,vddio_pex_clk";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo1";
|
||||
regulator-name = "vdd_ldo1,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo2";
|
||||
regulator-name = "vdd_ldo2,vdd_rtc";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo3";
|
||||
regulator-name = "vdd_ldo3,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo4";
|
||||
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo5";
|
||||
regulator-name = "vdd_ldo5,vcore_mmc";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
};
|
||||
|
||||
regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo6";
|
||||
regulator-name = "vdd_ldo6,avdd_vdac";
|
||||
/*
|
||||
* According to the Tegra 2 Automotive
|
||||
* DataSheet, a typical value for this
|
||||
* would be 2.8V, but the PMIC only
|
||||
* supports 2.85V.
|
||||
*/
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
};
|
||||
|
||||
regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo7";
|
||||
regulator-name = "vdd_ldo7,avdd_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo8";
|
||||
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "ldo9";
|
||||
regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
|
||||
/*
|
||||
* According to the Tegra 2 Automotive
|
||||
* DataSheet, a typical value for this
|
||||
* would be 2.8V, but the PMIC only
|
||||
* supports 2.85V.
|
||||
*/
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@14 {
|
||||
reg = <14>;
|
||||
regulator-compatible = "ldo_rtc";
|
||||
regulator-name = "vdd_rtc_out";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmc {
|
||||
nvidia,invert-interrupt;
|
||||
};
|
||||
|
||||
usb@c5008000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sdhci@c8000600 {
|
||||
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
|
||||
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vdd_5v0_reg: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <0>;
|
||||
regulator-name = "vdd_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/dts-v1/;
|
||||
|
||||
/include/ "tegra20-tamonten.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Avionic Design Tamonten Evaluation Carrier";
|
||||
compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
|
||||
|
||||
i2c@7000c000 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
wm8903: wm8903@1a {
|
||||
compatible = "wlf,wm8903";
|
||||
reg = <0x1a>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <187 0x04>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
micdet-cfg = <0>;
|
||||
micdet-delay = <100>;
|
||||
gpio-cfg = <0xffffffff
|
||||
0xffffffff
|
||||
0
|
||||
0xffffffff
|
||||
0xffffffff>;
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "ad,tegra-audio-wm8903-tec",
|
||||
"nvidia,tegra-audio-wm8903";
|
||||
nvidia,model = "Avionic Design TEC";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "HPOUTR",
|
||||
"Headphone Jack", "HPOUTL",
|
||||
"Int Spk", "ROP",
|
||||
"Int Spk", "RON",
|
||||
"Int Spk", "LOP",
|
||||
"Int Spk", "LON",
|
||||
"Mic Jack", "MICBIAS",
|
||||
"IN1L", "Mic Jack";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&wm8903>;
|
||||
|
||||
nvidia,spkr-en-gpios = <&wm8903 2 0>;
|
||||
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
|
||||
};
|
||||
};
|
||||
|
|
@ -267,6 +267,8 @@
|
|||
reg = <0x3c>;
|
||||
interrupts = <0 86 0x4>;
|
||||
|
||||
maxim,system-power-controller;
|
||||
|
||||
mbatt-supply = <&usb0_vbus_reg>;
|
||||
in-v1-supply = <&mbatt_reg>;
|
||||
in-v2-supply = <&mbatt_reg>;
|
||||
|
|
|
|||
|
|
@ -123,7 +123,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm {
|
||||
pwm: pwm {
|
||||
compatible = "nvidia,tegra20-pwm";
|
||||
reg = <0x7000a000 0x100>;
|
||||
#pwm-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm {
|
||||
pwm: pwm {
|
||||
compatible = "nvidia,tegra30-pwm", "nvidia,tegra20-pwm";
|
||||
reg = <0x7000a000 0x100>;
|
||||
#pwm-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -3,8 +3,11 @@ params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
|
|||
initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
|
||||
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-harmony.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-medcom-wide.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-plutux.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-tec.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-whistler.dtb
|
||||
|
|
|
|||
Loading…
Reference in New Issue