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drm/nve0/fifo: mask unhandled intr bits when seen, rather than all intrs 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2014-02-23 23:06:22 +10:00
parent 61fdf62093
commit 7a42f492a3
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
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@ -743,9 +743,9 @@ nve0_fifo_intr(struct nouveau_subdev *subdev)
}
if (stat) {
nv_fatal(priv, "unhandled status 0x%08x\n", stat);
nv_error(priv, "INTR 0x%08x\n", stat);
nv_mask(priv, 0x002140, stat, 0x00000000);
nv_wr32(priv, 0x002100, stat);
nv_wr32(priv, 0x002140, 0);
}
}