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spi: fsl-espi: Fix an error that can cause fsl espi task blocked 

Incorrect condition is used in spin_event_timeout().  When the TX is
done, the SPIE_NF bit in ESPI_SPIE register is set to 1 to indicate the
Tx FIFO is not full.  If the bit is 0, it indicates the Tx FIFO is full.

Due to this error, if the Tx FIFO is full at the beginning, but becomes
not full after handling the Rx FIFO (the SPIE_NF bit is set), the
spin_event_timeout() returns with timeout occurred.  It causes the
interrupt handler not to send completion notification to the thread that
called wait_for_complete() waiting for the notification.

Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jane Wan 2015-05-01 16:37:42 -07:00 committed by Mark Brown
parent b787f68c36
commit 7a0a1759f7
1 changed files with 5 additions and 1 deletions
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6
drivers/spi/spi-fsl-espi.c
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@ -544,9 +544,13 @@ void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
/* spin until TX is done */ /* spin until TX is done */
ret = spin_event_timeout(((events = mpc8xxx_spi_read_reg( ret = spin_event_timeout(((events = mpc8xxx_spi_read_reg(
&reg_base->event)) & SPIE_NF) == 0, 1000, 0); &reg_base->event)) & SPIE_NF), 1000, 0);
if (!ret) { if (!ret) {
dev_err(mspi->dev, "tired waiting for SPIE_NF\n"); dev_err(mspi->dev, "tired waiting for SPIE_NF\n");
/* Clear the SPIE bits */
mpc8xxx_spi_write_reg(&reg_base->event, events);
complete(&mspi->done);
return; return;
} }
} }