[IA64] Scaling fix for simultaneous unaligned accesses
Eliminate a hot shared cacheline that occurs if multiple cpus are taking unaligned exceptions. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
parent
dc64161343
commit
79c83bd15a
|
@ -1283,8 +1283,9 @@ within_logging_rate_limit (void)
|
|||
|
||||
if (jiffies - last_time > 5*HZ)
|
||||
count = 0;
|
||||
if (++count < 5) {
|
||||
if (count < 5) {
|
||||
last_time = jiffies;
|
||||
count++;
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
|
|
Loading…
Reference in New Issue