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powerpc/usb: fix usb CTRL_PHY_CLK_VALID breaks on some platform 

Fix checking of CTRL_PHY_CLK_VALID bit break on some platform on which
there is not USB CTRL_PHY_CLK_VALID bit.
  - P1023/P3041/P5020 etc,have this bit
  - P3060/4080/PSC913x do have this bit, but not mentioned in RM.
  - P1022(perhaps and other) has no this bit

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Shengzhou Liu 2012-02-25 23:56:30 +08:00 committed by Greg Kroah-Hartman
parent 87364624e2
commit 79857e8e7b
1 changed files with 14 additions and 10 deletions
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24
drivers/usb/host/ehci-fsl.c
View File

@ -248,7 +248,11 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
struct usb_hcd *hcd = ehci_to_hcd(ehci); struct usb_hcd *hcd = ehci_to_hcd(ehci);
struct fsl_usb2_platform_data *pdata; struct fsl_usb2_platform_data *pdata;
void __iomem *non_ehci = hcd->regs; void __iomem *non_ehci = hcd->regs;
u32 temp; u32 temp, chip, rev, svr;
svr = mfspr(SPRN_SVR);
chip = svr >> 16;
rev = (svr >> 4) & 0xf;
pdata = hcd->self.controller->platform_data; pdata = hcd->self.controller->platform_data;
@ -274,12 +278,6 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0); ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
if (pdata->operating_mode == FSL_USB2_MPH_HOST) { if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
unsigned int chip, rev, svr;
svr = mfspr(SPRN_SVR);
chip = svr >> 16;
rev = (svr >> 4) & 0xf;
/* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */ /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
ehci->has_fsl_port_bug = 1; ehci->has_fsl_port_bug = 1;
@ -301,9 +299,15 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
} }
if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) { /* There is no CTRL_PHY_CLK_VALID bit on some platforms, e.g. P1022 */
printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n"); #define SVR_P1022_N_ID 0x80E6
return -ENODEV; #define SVR_P1022_S_ID 0x80EE
if (chip != SVR_P1022_N_ID && chip != SVR_P1022_S_ID) {
if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
CTRL_PHY_CLK_VALID)) {
printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
return -ENODEV;
}
} }
return 0; return 0;
} }