This tag contains two MTU patches based on top of the ux500 sparse IRQ
commit to avoid merge clashes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJQpkOmAAoJEEEQszewGV1zVQ8P/0WGwb+qp2iSMGQUzw2UOx7i POYaWiOPoVd6+WwhS4Y87j8BkD5jswPILK6rudyt3fBU9SmwinmF4OFYVbv07LXe qI+BjxS8Y2VyGM/xZLQmx/M7jzu3d9MF0mSIv9KBW5rQppBr8XBd0wtO2g7bPuuu BI77QoX8zClVdoid0qgwQWjsHtdrXqZ0p6iFGLMbUlAl26uzhGS7bzow7kufUJtM NdfzfJprdMYSDc1+1Krw4Zb4MTsCfKKhJJsDnfv83nnTqAxoZ2Ml676RYvj8inR1 ptuA+1kT0BJqGyLCI3okMzp3z1vHodeE8NpAAItMgTdZ2b5hX8Tclzrf+byPqgJN xk+hmDne/I4Hl+JyG7E5dJHhLa+xdeIPte+7h/qvBvQzKeNuBRiSbjaKGw0KBLrB w773p70IaMFGDcBOU1akuP4Q9jU3S9VQkkTaCGH7jNxzsyvYFV9BOjlMzjDMVFc2 APc9f0ARd3Ww014TDBC6X4L4OEkyN6/F6NnHJfFd+G+/zLSQG1+GnB9NiIrIwBmF FBYIsna1holAP239zWoBP23+GhH+OF46xRvt8TGIJO5E+p/KSJJU2VZkcsjOm15F ZJnfUeF9kE61QGgV4bQzNBw3Gc7Plk0GczAkqKDPX74oxtNsGI60aDi0UgMVa+G/ L6cu+2gIUytKI+5Pr4r8 =7BtO -----END PGP SIGNATURE----- Merge tag 'mtu-clk-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/multiplatform From Linus Walleij <linus.walleij@linaro.org>: This tag contains two MTU patches based on top of the ux500 sparse IRQ commit to avoid merge clashes. * tag 'mtu-clk-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit
794c1539ab
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@ -160,12 +160,6 @@ void u8500_clk_init(void)
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clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT);
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clk_register_clkdev(clk, NULL, "uicc");
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/*
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* FIXME: The MTU clocks might need some kind of "parent muxed join"
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* and these have no K-clocks. For now, we ignore the missing
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* connection to the corresponding P-clocks, p6_mtu0_clk and
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* p6_mtu1_clk. Instead timclk is used which is the valid parent.
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*/
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clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT);
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clk_register_clkdev(clk, NULL, "mtu0");
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clk_register_clkdev(clk, NULL, "mtu1");
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@ -379,8 +373,11 @@ void u8500_clk_init(void)
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clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", U8500_CLKRST6_BASE,
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BIT(6), 0);
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clk_register_clkdev(clk, "apb_pclk", "mtu0");
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clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", U8500_CLKRST6_BASE,
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BIT(7), 0);
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clk_register_clkdev(clk, "apb_pclk", "mtu1");
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/* PRCC K-clocks
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*
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@ -177,9 +177,15 @@ void nmdk_clksrc_reset(void)
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void __init nmdk_timer_init(void __iomem *base, int irq)
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{
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unsigned long rate;
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struct clk *clk0;
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struct clk *clk0, *pclk0;
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mtu_base = base;
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pclk0 = clk_get_sys("mtu0", "apb_pclk");
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BUG_ON(IS_ERR(pclk0));
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BUG_ON(clk_prepare(pclk0) < 0);
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BUG_ON(clk_enable(pclk0) < 0);
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clk0 = clk_get_sys("mtu0", NULL);
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BUG_ON(IS_ERR(clk0));
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BUG_ON(clk_prepare(clk0) < 0);
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