mlxsw: reg: Add Infiniband support to PTYS
In order to support Infiniband fabric, we need to introduce IB speeds and capabilities to PTYS emads. Signed-off-by: Elad Raz <eladr@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2054,6 +2054,7 @@ MLXSW_REG_DEFINE(ptys, MLXSW_REG_PTYS_ID, MLXSW_REG_PTYS_LEN);
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*/
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*/
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MLXSW_ITEM32(reg, ptys, local_port, 0x00, 16, 8);
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MLXSW_ITEM32(reg, ptys, local_port, 0x00, 16, 8);
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#define MLXSW_REG_PTYS_PROTO_MASK_IB BIT(0)
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#define MLXSW_REG_PTYS_PROTO_MASK_ETH BIT(2)
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#define MLXSW_REG_PTYS_PROTO_MASK_ETH BIT(2)
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/* reg_ptys_proto_mask
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/* reg_ptys_proto_mask
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@ -2112,18 +2113,61 @@ MLXSW_ITEM32(reg, ptys, an_status, 0x04, 28, 4);
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*/
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*/
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MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
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MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
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/* reg_ptys_ib_link_width_cap
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* IB port supported widths.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_link_width_cap, 0x10, 16, 16);
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#define MLXSW_REG_PTYS_IB_SPEED_SDR BIT(0)
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#define MLXSW_REG_PTYS_IB_SPEED_DDR BIT(1)
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#define MLXSW_REG_PTYS_IB_SPEED_QDR BIT(2)
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#define MLXSW_REG_PTYS_IB_SPEED_FDR10 BIT(3)
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#define MLXSW_REG_PTYS_IB_SPEED_FDR BIT(4)
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#define MLXSW_REG_PTYS_IB_SPEED_EDR BIT(5)
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/* reg_ptys_ib_proto_cap
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* IB port supported speeds and protocols.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_proto_cap, 0x10, 0, 16);
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/* reg_ptys_eth_proto_admin
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/* reg_ptys_eth_proto_admin
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* Speed and protocol to set port to.
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* Speed and protocol to set port to.
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* Access: RW
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* Access: RW
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*/
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*/
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MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
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MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
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/* reg_ptys_ib_link_width_admin
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* IB width to set port to.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, ptys, ib_link_width_admin, 0x1C, 16, 16);
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/* reg_ptys_ib_proto_admin
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* IB speeds and protocols to set port to.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, ptys, ib_proto_admin, 0x1C, 0, 16);
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/* reg_ptys_eth_proto_oper
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/* reg_ptys_eth_proto_oper
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* The current speed and protocol configured for the port.
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* The current speed and protocol configured for the port.
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* Access: RO
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* Access: RO
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*/
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*/
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MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
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MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
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/* reg_ptys_ib_link_width_oper
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* The current IB width to set port to.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_link_width_oper, 0x28, 16, 16);
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/* reg_ptys_ib_proto_oper
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* The current IB speed and protocol.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_proto_oper, 0x28, 0, 16);
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/* reg_ptys_eth_proto_lp_advertise
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/* reg_ptys_eth_proto_lp_advertise
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* The protocols that were advertised by the link partner during
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* The protocols that were advertised by the link partner during
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* autonegotiation.
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* autonegotiation.
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@ -2153,6 +2197,33 @@ static inline void mlxsw_reg_ptys_eth_unpack(char *payload,
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*p_eth_proto_oper = mlxsw_reg_ptys_eth_proto_oper_get(payload);
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*p_eth_proto_oper = mlxsw_reg_ptys_eth_proto_oper_get(payload);
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}
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}
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static inline void mlxsw_reg_ptys_ib_pack(char *payload, u8 local_port,
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u16 proto_admin, u16 link_width)
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{
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MLXSW_REG_ZERO(ptys, payload);
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mlxsw_reg_ptys_local_port_set(payload, local_port);
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mlxsw_reg_ptys_proto_mask_set(payload, MLXSW_REG_PTYS_PROTO_MASK_IB);
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mlxsw_reg_ptys_ib_proto_admin_set(payload, proto_admin);
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mlxsw_reg_ptys_ib_link_width_admin_set(payload, link_width);
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}
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static inline void mlxsw_reg_ptys_ib_unpack(char *payload, u16 *p_ib_proto_cap,
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u16 *p_ib_link_width_cap,
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u16 *p_ib_proto_oper,
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u16 *p_ib_link_width_oper)
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{
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if (p_ib_proto_cap)
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*p_ib_proto_cap = mlxsw_reg_ptys_ib_proto_cap_get(payload);
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if (p_ib_link_width_cap)
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*p_ib_link_width_cap =
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mlxsw_reg_ptys_ib_link_width_cap_get(payload);
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if (p_ib_proto_oper)
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*p_ib_proto_oper = mlxsw_reg_ptys_ib_proto_oper_get(payload);
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if (p_ib_link_width_oper)
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*p_ib_link_width_oper =
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mlxsw_reg_ptys_ib_link_width_oper_get(payload);
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}
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/* PPAD - Port Physical Address Register
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/* PPAD - Port Physical Address Register
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* -------------------------------------
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* -------------------------------------
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* The PPAD register configures the per port physical MAC address.
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* The PPAD register configures the per port physical MAC address.
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