spi: atmel: Use core SPI_MASTER_MUST_[RT]X handling
We need both RX and TX data for each transfer in any case (PIO, PDC, DMA). So convert the driver to the core dummy buffer handling with the SPI_MASTER_MUST_RX/SPI_MASTER_MUST_TX infrastructure. This move changes the maximum PDC/DMA buffer handling to 65535 bytes instead of a single page and sets master->max_dma_len to this value. All dummy buffer management is removed from the driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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ce24a513fb
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@ -303,10 +303,6 @@ struct atmel_spi {
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struct completion xfer_completion;
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/* scratch buffer */
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void *buffer;
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dma_addr_t buffer_dma;
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struct atmel_spi_caps caps;
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bool use_dma;
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@ -327,7 +323,7 @@ struct atmel_spi_device {
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u32 csr;
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};
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#define BUFFER_SIZE PAGE_SIZE
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#define SPI_MAX_DMA_XFER 65535 /* true for both PDC and DMA */
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#define INVALID_DMA_ADDRESS 0xffffffff
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/*
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@ -612,14 +608,10 @@ static void atmel_spi_next_xfer_single(struct spi_master *master,
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cpu_relax();
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}
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if (xfer->tx_buf) {
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if (xfer->bits_per_word > 8)
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spi_writel(as, TDR, *(u16 *)(xfer->tx_buf + xfer_pos));
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else
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spi_writel(as, TDR, *(u8 *)(xfer->tx_buf + xfer_pos));
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} else {
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spi_writel(as, TDR, 0);
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}
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dev_dbg(master->dev.parent,
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" start pio xfer %p: len %u tx %p rx %p bitpw %d\n",
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@ -666,7 +658,6 @@ static void atmel_spi_next_xfer_fifo(struct spi_master *master,
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/* Fill TX FIFO */
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while (num_data >= 2) {
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if (xfer->tx_buf) {
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if (xfer->bits_per_word > 8) {
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td0 = *words++;
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td1 = *words++;
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@ -674,24 +665,16 @@ static void atmel_spi_next_xfer_fifo(struct spi_master *master,
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td0 = *bytes++;
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td1 = *bytes++;
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}
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} else {
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td0 = 0;
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td1 = 0;
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}
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spi_writel(as, TDR, (td1 << 16) | td0);
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num_data -= 2;
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}
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if (num_data) {
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if (xfer->tx_buf) {
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if (xfer->bits_per_word > 8)
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td0 = *words++;
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else
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td0 = *bytes++;
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} else {
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td0 = 0;
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}
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spi_writew(as, TDR, td0);
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num_data--;
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@ -750,24 +733,14 @@ static int atmel_spi_next_xfer_dma_submit(struct spi_master *master,
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/* prepare the RX dma transfer */
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sg_init_table(&as->dma.sgrx, 1);
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if (xfer->rx_buf) {
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as->dma.sgrx.dma_address = xfer->rx_dma + xfer->len - *plen;
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} else {
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as->dma.sgrx.dma_address = as->buffer_dma;
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if (len > BUFFER_SIZE)
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len = BUFFER_SIZE;
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}
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/* prepare the TX dma transfer */
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sg_init_table(&as->dma.sgtx, 1);
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if (xfer->tx_buf) {
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as->dma.sgtx.dma_address = xfer->tx_dma + xfer->len - *plen;
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} else {
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as->dma.sgtx.dma_address = as->buffer_dma;
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if (len > BUFFER_SIZE)
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len = BUFFER_SIZE;
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memset(as->buffer, 0, len);
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}
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if (len > master->max_dma_len)
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len = master->max_dma_len;
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sg_dma_len(&as->dma.sgtx) = len;
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sg_dma_len(&as->dma.sgrx) = len;
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@ -834,25 +807,10 @@ static void atmel_spi_next_xfer_data(struct spi_master *master,
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struct atmel_spi *as = spi_master_get_devdata(master);
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u32 len = *plen;
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/* use scratch buffer only when rx or tx data is unspecified */
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if (xfer->rx_buf)
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*rx_dma = xfer->rx_dma + xfer->len - *plen;
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else {
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*rx_dma = as->buffer_dma;
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if (len > BUFFER_SIZE)
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len = BUFFER_SIZE;
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}
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if (xfer->tx_buf)
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*tx_dma = xfer->tx_dma + xfer->len - *plen;
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else {
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*tx_dma = as->buffer_dma;
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if (len > BUFFER_SIZE)
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len = BUFFER_SIZE;
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memset(as->buffer, 0, len);
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dma_sync_single_for_device(&as->pdev->dev,
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as->buffer_dma, len, DMA_TO_DEVICE);
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}
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if (len > master->max_dma_len)
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len = master->max_dma_len;
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*plen = len;
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}
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@ -1026,7 +984,6 @@ atmel_spi_pump_single_data(struct atmel_spi *as, struct spi_transfer *xfer)
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u16 *rxp16;
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unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
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if (xfer->rx_buf) {
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if (xfer->bits_per_word > 8) {
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rxp16 = (u16 *)(((u8 *)xfer->rx_buf) + xfer_pos);
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*rxp16 = spi_readl(as, RDR);
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@ -1034,9 +991,6 @@ atmel_spi_pump_single_data(struct atmel_spi *as, struct spi_transfer *xfer)
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rxp = ((u8 *)xfer->rx_buf) + xfer_pos;
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*rxp = spi_readl(as, RDR);
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}
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} else {
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spi_readl(as, RDR);
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}
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if (xfer->bits_per_word > 8) {
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if (as->current_remaining_bytes > 2)
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as->current_remaining_bytes -= 2;
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@ -1074,12 +1028,10 @@ atmel_spi_pump_fifo_data(struct atmel_spi *as, struct spi_transfer *xfer)
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/* Read data */
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while (num_data) {
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rd = spi_readl(as, RDR);
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if (xfer->rx_buf) {
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if (xfer->bits_per_word > 8)
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*words++ = rd;
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else
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*bytes++ = rd;
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}
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num_data--;
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}
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}
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@ -1561,29 +1513,22 @@ static int atmel_spi_probe(struct platform_device *pdev)
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master->bus_num = pdev->id;
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master->num_chipselect = master->dev.of_node ? 0 : 4;
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master->setup = atmel_spi_setup;
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master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX);
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master->transfer_one_message = atmel_spi_transfer_one_message;
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master->cleanup = atmel_spi_cleanup;
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master->auto_runtime_pm = true;
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master->max_dma_len = SPI_MAX_DMA_XFER;
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platform_set_drvdata(pdev, master);
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as = spi_master_get_devdata(master);
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/*
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* Scratch buffer is used for throwaway rx and tx data.
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* It's coherent to minimize dcache pollution.
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*/
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as->buffer = dma_alloc_coherent(&pdev->dev, BUFFER_SIZE,
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&as->buffer_dma, GFP_KERNEL);
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if (!as->buffer)
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goto out_free;
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spin_lock_init(&as->lock);
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as->pdev = pdev;
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as->regs = devm_ioremap_resource(&pdev->dev, regs);
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if (IS_ERR(as->regs)) {
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ret = PTR_ERR(as->regs);
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goto out_free_buffer;
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goto out_unmap_regs;
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}
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as->phybase = regs->start;
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as->irq = irq;
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@ -1681,9 +1626,6 @@ out_free_dma:
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clk_disable_unprepare(clk);
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out_free_irq:
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out_unmap_regs:
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out_free_buffer:
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dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
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as->buffer_dma);
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out_free:
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spi_master_put(master);
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return ret;
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@ -1708,9 +1650,6 @@ static int atmel_spi_remove(struct platform_device *pdev)
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spi_readl(as, SR);
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spin_unlock_irq(&as->lock);
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dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
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as->buffer_dma);
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clk_disable_unprepare(as->clk);
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pm_runtime_put_noidle(&pdev->dev);
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