From 790437bbe0ef7e5cb5d091dd711c0d61d03945a5 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Tue, 10 Oct 2023 16:35:28 +0300 Subject: [PATCH] clk: stm32: Fix a signedness issue in clk_stm32_composite_determine_rate() The divider_ro_round_rate() function could potentially return -EINVAL on error but the error handling doesn't work because "rate" is unsigned. It should be a type long. Fixes: 06ed0fc0fbac ("clk: stm32: composite: Switch to determine_rate") Signed-off-by: Dan Carpenter Link: https://lore.kernel.org/r/d9a78453-9b40-48c1-830e-00751ba3ecb8@kili.mountain Acked-by: Maxime Ripard Signed-off-by: Stephen Boyd --- drivers/clk/stm32/clk-stm32-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c index d5aa09e9fce4..067b918a8894 100644 --- a/drivers/clk/stm32/clk-stm32-core.c +++ b/drivers/clk/stm32/clk-stm32-core.c @@ -431,7 +431,7 @@ static int clk_stm32_composite_determine_rate(struct clk_hw *hw, { struct clk_stm32_composite *composite = to_clk_stm32_composite(hw); const struct stm32_div_cfg *divider; - unsigned long rate; + long rate; if (composite->div_id == NO_STM32_DIV) return 0;