include/asm-x86/atomic_32.h: checkpatch cleanups - formatting only

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Joe Perches 2008-03-23 01:01:41 -07:00 committed by Ingo Molnar
parent 3c311febfa
commit 78ff12eec4
1 changed files with 68 additions and 75 deletions

View File

@ -15,7 +15,9 @@
* on us. We need to use _exactly_ the address the user gave us, * on us. We need to use _exactly_ the address the user gave us,
* not some alias that contains the same information. * not some alias that contains the same information.
*/ */
typedef struct { int counter; } atomic_t; typedef struct {
int counter;
} atomic_t;
#define ATOMIC_INIT(i) { (i) } #define ATOMIC_INIT(i) { (i) }
@ -34,7 +36,7 @@ typedef struct { int counter; } atomic_t;
* *
* Atomically sets the value of @v to @i. * Atomically sets the value of @v to @i.
*/ */
#define atomic_set(v,i) (((v)->counter) = (i)) #define atomic_set(v, i) (((v)->counter) = (i))
/** /**
* atomic_add - add integer to atomic variable * atomic_add - add integer to atomic variable
@ -43,12 +45,11 @@ typedef struct { int counter; } atomic_t;
* *
* Atomically adds @i to @v. * Atomically adds @i to @v.
*/ */
static __inline__ void atomic_add(int i, atomic_t *v) static inline void atomic_add(int i, atomic_t *v)
{ {
__asm__ __volatile__( asm volatile(LOCK_PREFIX "addl %1,%0"
LOCK_PREFIX "addl %1,%0" : "+m" (v->counter)
:"+m" (v->counter) : "ir" (i));
:"ir" (i));
} }
/** /**
@ -58,12 +59,11 @@ static __inline__ void atomic_add(int i, atomic_t *v)
* *
* Atomically subtracts @i from @v. * Atomically subtracts @i from @v.
*/ */
static __inline__ void atomic_sub(int i, atomic_t *v) static inline void atomic_sub(int i, atomic_t *v)
{ {
__asm__ __volatile__( asm volatile(LOCK_PREFIX "subl %1,%0"
LOCK_PREFIX "subl %1,%0" : "+m" (v->counter)
:"+m" (v->counter) : "ir" (i));
:"ir" (i));
} }
/** /**
@ -75,14 +75,13 @@ static __inline__ void atomic_sub(int i, atomic_t *v)
* true if the result is zero, or false for all * true if the result is zero, or false for all
* other cases. * other cases.
*/ */
static __inline__ int atomic_sub_and_test(int i, atomic_t *v) static inline int atomic_sub_and_test(int i, atomic_t *v)
{ {
unsigned char c; unsigned char c;
__asm__ __volatile__( asm volatile(LOCK_PREFIX "subl %2,%0; sete %1"
LOCK_PREFIX "subl %2,%0; sete %1" : "+m" (v->counter), "=qm" (c)
:"+m" (v->counter), "=qm" (c) : "ir" (i) : "memory");
:"ir" (i) : "memory");
return c; return c;
} }
@ -92,11 +91,10 @@ static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
* *
* Atomically increments @v by 1. * Atomically increments @v by 1.
*/ */
static __inline__ void atomic_inc(atomic_t *v) static inline void atomic_inc(atomic_t *v)
{ {
__asm__ __volatile__( asm volatile(LOCK_PREFIX "incl %0"
LOCK_PREFIX "incl %0" : "+m" (v->counter));
:"+m" (v->counter));
} }
/** /**
@ -105,11 +103,10 @@ static __inline__ void atomic_inc(atomic_t *v)
* *
* Atomically decrements @v by 1. * Atomically decrements @v by 1.
*/ */
static __inline__ void atomic_dec(atomic_t *v) static inline void atomic_dec(atomic_t *v)
{ {
__asm__ __volatile__( asm volatile(LOCK_PREFIX "decl %0"
LOCK_PREFIX "decl %0" : "+m" (v->counter));
:"+m" (v->counter));
} }
/** /**
@ -120,13 +117,12 @@ static __inline__ void atomic_dec(atomic_t *v)
* returns true if the result is 0, or false for all other * returns true if the result is 0, or false for all other
* cases. * cases.
*/ */
static __inline__ int atomic_dec_and_test(atomic_t *v) static inline int atomic_dec_and_test(atomic_t *v)
{ {
unsigned char c; unsigned char c;
__asm__ __volatile__( asm volatile(LOCK_PREFIX "decl %0; sete %1"
LOCK_PREFIX "decl %0; sete %1" : "+m" (v->counter), "=qm" (c)
:"+m" (v->counter), "=qm" (c)
: : "memory"); : : "memory");
return c != 0; return c != 0;
} }
@ -139,13 +135,12 @@ static __inline__ int atomic_dec_and_test(atomic_t *v)
* and returns true if the result is zero, or false for all * and returns true if the result is zero, or false for all
* other cases. * other cases.
*/ */
static __inline__ int atomic_inc_and_test(atomic_t *v) static inline int atomic_inc_and_test(atomic_t *v)
{ {
unsigned char c; unsigned char c;
__asm__ __volatile__( asm volatile(LOCK_PREFIX "incl %0; sete %1"
LOCK_PREFIX "incl %0; sete %1" : "+m" (v->counter), "=qm" (c)
:"+m" (v->counter), "=qm" (c)
: : "memory"); : : "memory");
return c != 0; return c != 0;
} }
@ -159,14 +154,13 @@ static __inline__ int atomic_inc_and_test(atomic_t *v)
* if the result is negative, or false when * if the result is negative, or false when
* result is greater than or equal to zero. * result is greater than or equal to zero.
*/ */
static __inline__ int atomic_add_negative(int i, atomic_t *v) static inline int atomic_add_negative(int i, atomic_t *v)
{ {
unsigned char c; unsigned char c;
__asm__ __volatile__( asm volatile(LOCK_PREFIX "addl %2,%0; sets %1"
LOCK_PREFIX "addl %2,%0; sets %1" : "+m" (v->counter), "=qm" (c)
:"+m" (v->counter), "=qm" (c) : "ir" (i) : "memory");
:"ir" (i) : "memory");
return c; return c;
} }
@ -177,19 +171,18 @@ static __inline__ int atomic_add_negative(int i, atomic_t *v)
* *
* Atomically adds @i to @v and returns @i + @v * Atomically adds @i to @v and returns @i + @v
*/ */
static __inline__ int atomic_add_return(int i, atomic_t *v) static inline int atomic_add_return(int i, atomic_t *v)
{ {
int __i; int __i;
#ifdef CONFIG_M386 #ifdef CONFIG_M386
unsigned long flags; unsigned long flags;
if(unlikely(boot_cpu_data.x86 <= 3)) if (unlikely(boot_cpu_data.x86 <= 3))
goto no_xadd; goto no_xadd;
#endif #endif
/* Modern 486+ processor */ /* Modern 486+ processor */
__i = i; __i = i;
__asm__ __volatile__( asm volatile(LOCK_PREFIX "xaddl %0, %1"
LOCK_PREFIX "xaddl %0, %1" : "+r" (i), "+m" (v->counter)
:"+r" (i), "+m" (v->counter)
: : "memory"); : : "memory");
return i + __i; return i + __i;
@ -210,9 +203,9 @@ no_xadd: /* Legacy 386 processor */
* *
* Atomically subtracts @i from @v and returns @v - @i * Atomically subtracts @i from @v and returns @v - @i
*/ */
static __inline__ int atomic_sub_return(int i, atomic_t *v) static inline int atomic_sub_return(int i, atomic_t *v)
{ {
return atomic_add_return(-i,v); return atomic_add_return(-i, v);
} }
#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new))) #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
@ -227,7 +220,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v)
* Atomically adds @a to @v, so long as @v was not already @u. * Atomically adds @a to @v, so long as @v was not already @u.
* Returns non-zero if @v was not @u, and zero otherwise. * Returns non-zero if @v was not @u, and zero otherwise.
*/ */
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) static inline int atomic_add_unless(atomic_t *v, int a, int u)
{ {
int c, old; int c, old;
c = atomic_read(v); c = atomic_read(v);
@ -244,17 +237,17 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
#define atomic_inc_return(v) (atomic_add_return(1,v)) #define atomic_inc_return(v) (atomic_add_return(1, v))
#define atomic_dec_return(v) (atomic_sub_return(1,v)) #define atomic_dec_return(v) (atomic_sub_return(1, v))
/* These are x86-specific, used by some header files */ /* These are x86-specific, used by some header files */
#define atomic_clear_mask(mask, addr) \ #define atomic_clear_mask(mask, addr) \
__asm__ __volatile__(LOCK_PREFIX "andl %0,%1" \ asm volatile(LOCK_PREFIX "andl %0,%1" \
: : "r" (~(mask)),"m" (*addr) : "memory") : : "r" (~(mask)), "m" (*(addr)) : "memory")
#define atomic_set_mask(mask, addr) \ #define atomic_set_mask(mask, addr) \
__asm__ __volatile__(LOCK_PREFIX "orl %0,%1" \ asm volatile(LOCK_PREFIX "orl %0,%1" \
: : "r" (mask),"m" (*(addr)) : "memory") : : "r" (mask), "m" (*(addr)) : "memory")
/* Atomic operations are already serializing on x86 */ /* Atomic operations are already serializing on x86 */
#define smp_mb__before_atomic_dec() barrier() #define smp_mb__before_atomic_dec() barrier()