csky: fixup save hi,lo,dspcr regs in switch_stack.
HI, LO, DSPCR registers are 807/810 related regs and no need for 610/860. All of the regs must be saved in pt_regs and switch_stack. This patch fixup saving dspcr reg in switch_stack and pt_regs. Signed-off-by: Guo Ren <ren_guo@c-sky.com>
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31295a72b5
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789154c2ad
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@ -0,0 +1,17 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef __ABI_CSKY_PTRACE_H
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#define __ABI_CSKY_PTRACE_H
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struct switch_stack {
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unsigned long r8;
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unsigned long r9;
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unsigned long r10;
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unsigned long r11;
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unsigned long r12;
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unsigned long r13;
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unsigned long r14;
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unsigned long r15;
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};
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#endif /* __ABI_CSKY_PTRACE_H */
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@ -57,6 +57,8 @@
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stw lr, (sp, 60)
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mflo lr
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stw lr, (sp, 64)
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mfcr lr, cr14
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stw lr, (sp, 68)
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#endif
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subi sp, 80
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.endm
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@ -77,6 +79,8 @@
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mthi a0
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ldw a0, (sp, 144)
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mtlo a0
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ldw a0, (sp, 148)
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mtcr a0, cr14
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#endif
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ldw a0, (sp, 24)
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@ -93,9 +97,9 @@
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.endm
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.macro SAVE_SWITCH_STACK
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subi sp, 64
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subi sp, 64
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stm r4-r11, (sp)
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stw r15, (sp, 32)
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stw lr, (sp, 32)
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stw r16, (sp, 36)
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stw r17, (sp, 40)
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stw r26, (sp, 44)
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@ -103,11 +107,29 @@
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stw r28, (sp, 52)
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stw r29, (sp, 56)
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stw r30, (sp, 60)
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#ifdef CONFIG_CPU_HAS_HILO
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subi sp, 16
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mfhi lr
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stw lr, (sp, 0)
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mflo lr
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stw lr, (sp, 4)
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mfcr lr, cr14
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stw lr, (sp, 8)
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#endif
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.endm
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.macro RESTORE_SWITCH_STACK
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#ifdef CONFIG_CPU_HAS_HILO
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ldw lr, (sp, 0)
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mthi lr
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ldw lr, (sp, 4)
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mtlo lr
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ldw lr, (sp, 8)
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mtcr lr, cr14
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addi sp, 16
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#endif
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ldm r4-r11, (sp)
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ldw r15, (sp, 32)
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ldw lr, (sp, 32)
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ldw r16, (sp, 36)
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ldw r17, (sp, 40)
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ldw r26, (sp, 44)
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@ -0,0 +1,32 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef __ABI_CSKY_PTRACE_H
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#define __ABI_CSKY_PTRACE_H
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struct switch_stack {
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#ifdef CONFIG_CPU_HAS_HILO
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unsigned long rhi;
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unsigned long rlo;
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unsigned long cr14;
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unsigned long pad;
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#endif
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unsigned long r4;
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unsigned long r5;
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unsigned long r6;
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unsigned long r7;
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unsigned long r8;
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unsigned long r9;
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unsigned long r10;
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unsigned long r11;
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unsigned long r15;
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unsigned long r16;
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unsigned long r17;
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unsigned long r26;
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unsigned long r27;
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unsigned long r28;
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unsigned long r29;
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unsigned long r30;
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};
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#endif /* __ABI_CSKY_PTRACE_H */
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@ -11,6 +11,7 @@
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#include <asm/cache.h>
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#include <abi/reg_ops.h>
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#include <abi/regdef.h>
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#include <abi/switch_context.h>
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#ifdef CONFIG_CPU_HAS_FPU
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#include <abi/fpu.h>
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#endif
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@ -50,8 +51,6 @@ struct thread_struct {
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unsigned long ksp; /* kernel stack pointer */
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unsigned long sr; /* saved status register */
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unsigned long esp0; /* points to SR of stack frame */
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unsigned long hi;
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unsigned long lo;
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/* Other stuff associated with the thread. */
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unsigned long address; /* Last user fault */
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@ -36,7 +36,7 @@ struct pt_regs {
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unsigned long rhi;
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unsigned long rlo;
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unsigned long pad; /* reserved */
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unsigned long dcsr;
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#endif
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};
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@ -48,43 +48,6 @@ struct user_fp {
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unsigned long reserved;
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};
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/*
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* Switch stack for switch_to after push pt_regs.
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*
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* ABI_CSKYV2: r4 ~ r11, r15 ~ r17, r26 ~ r30;
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* ABI_CSKYV1: r8 ~ r14, r15;
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*/
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struct switch_stack {
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#if defined(__CSKYABIV2__)
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unsigned long r4;
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unsigned long r5;
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unsigned long r6;
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unsigned long r7;
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unsigned long r8;
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unsigned long r9;
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unsigned long r10;
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unsigned long r11;
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#else
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unsigned long r8;
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unsigned long r9;
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unsigned long r10;
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unsigned long r11;
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unsigned long r12;
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unsigned long r13;
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unsigned long r14;
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#endif
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unsigned long r15;
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#if defined(__CSKYABIV2__)
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unsigned long r16;
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unsigned long r17;
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unsigned long r26;
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unsigned long r27;
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unsigned long r28;
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unsigned long r29;
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unsigned long r30;
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#endif
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};
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#ifdef __KERNEL__
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#define PS_S 0x80000000 /* Supervisor Mode */
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@ -24,8 +24,6 @@ int main(void)
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DEFINE(THREAD_FESR, offsetof(struct thread_struct, user_fp.fesr));
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DEFINE(THREAD_FCR, offsetof(struct thread_struct, user_fp.fcr));
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DEFINE(THREAD_FPREG, offsetof(struct thread_struct, user_fp.vr));
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DEFINE(THREAD_DSPHI, offsetof(struct thread_struct, hi));
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DEFINE(THREAD_DSPLO, offsetof(struct thread_struct, lo));
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/* offsets into the thread_info struct */
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DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
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@ -346,34 +346,12 @@ ENTRY(__switch_to)
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stw sp, (a3, THREAD_KSP)
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#ifdef CONFIG_CPU_HAS_HILO
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lrw r10, THREAD_DSPHI
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add r10, a3
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mfhi r6
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mflo r7
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stw r6, (r10, 0) /* THREAD_DSPHI */
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stw r7, (r10, 4) /* THREAD_DSPLO */
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mfcr r6, cr14
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stw r6, (r10, 8) /* THREAD_DSPCSR */
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#endif
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/* Set up next process to run */
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lrw a3, TASK_THREAD
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addu a3, a1
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ldw sp, (a3, THREAD_KSP) /* Set next kernel sp */
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#ifdef CONFIG_CPU_HAS_HILO
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lrw r10, THREAD_DSPHI
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add r10, a3
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ldw r6, (r10, 8) /* THREAD_DSPCSR */
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mtcr r6, cr14
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ldw r6, (r10, 0) /* THREAD_DSPHI */
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ldw r7, (r10, 4) /* THREAD_DSPLO */
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mthi r6
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mtlo r7
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#endif
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ldw a2, (a3, THREAD_SR) /* Set next PSR */
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mtcr a2, psr
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@ -95,7 +95,9 @@ static int gpr_set(struct task_struct *target,
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return ret;
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regs.sr = task_pt_regs(target)->sr;
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#ifdef CONFIG_CPU_HAS_HILO
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regs.dcsr = task_pt_regs(target)->dcsr;
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#endif
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task_thread_info(target)->tp_value = regs.tls;
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*task_pt_regs(target) = regs;
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