ARC fixes for 5.2-rc4
- Fix for userspace trying to access kernel vaddr space - HSDK platform DT updates - Cleanup some build warnings -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJc9YpvAAoJEGnX8d3iisJe/cAQAKe0nM3w7hPGwKpk8QnVOrSM Hto0QR+mEQkyrad1lBgFSM6pQgp6ziVr54dXQz646+vItUPysHkxBQ5bAb6oLTce KpcjSwztO2AxTnIyhLGTm0pmUpzHvW/Dd+HV5a0sSK1lQ/Ph8LuqCljvjx7U0yMb niH2g9WJLxc4Ry6KaFRwKKUmRVUeof9TfNLRdz2+r46vZ7dnQvkLTCI4WcpUcrWx Dh4J2E6v6t8wTAYm+Ev6CtKYIE3LM2MbFeAHL5XDz8VTQB585pXMaLvDOzK6ANUz 6I8eUskx8L6WJd4qqE4ZmvTl0FXQGcONUSd4z6+Cj6NgmxHwMqdiw6Xv2Qo5SIGl vW3RVzdO8cuQj9Lfcydrng9XCh5rNI7yRXX7CNTZPY7hEPeaC1g91CHWVvvjTWes yd7pQf95K5ZokfdGNRqslngqdlxET8yBz2uKEc560BaWghtekIaPwTdBPY150jvr vALbrjFF8SBh8yH4ShMpYl0SkNeb1RjU7V4qDhukosQnhGqF0FWauW5ONd5ZREFr E7vQsicOqHx0loOABgeq4yvqH6aR/GvIUlulWJtoqaF7DSXxCiMzZTUyd1iavDEa 8xrV8kdbr1EJIOAih0A1YKANDw9z9W/16+Xz0ifRwPW6a3wMaDHPT2Z273LurdFd JUGZi4aA06xVVXvsLrCV =N0Dk -----END PGP SIGNATURE----- Merge tag 'arc-5.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC fixes from Vineet Gupta: - Fix for userspace trying to access kernel vaddr space - HSDK platform DT updates - Cleanup some build warnings * tag 'arc-5.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: [plat-hsdk] Get rid of inappropriate PHY settings ARC: [plat-hsdk]: Add support of Vivante GPU ARC: [plat-hsdk]: enable creg-gpio controller ARC: [plat-hsdk]: Add missing FIFO size entry in GMAC node ARC: [plat-hsdk]: Add missing multicast filter bins number to GMAC node ARC: mm: SIGSEGV userspace trying to access kernel virtual memory ARC: fix build warnings
This commit is contained in:
Linus Torvalds
commit
788a024921
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@ -11,7 +11,6 @@
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*/
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/dts-v1/;
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/reset/snps,hsdk-reset.h>
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/ {
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@ -167,6 +166,24 @@
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#clock-cells = <0>;
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};
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gpu_core_clk: gpu-core-clk {
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compatible = "fixed-clock";
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clock-frequency = <400000000>;
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#clock-cells = <0>;
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};
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gpu_dma_clk: gpu-dma-clk {
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compatible = "fixed-clock";
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clock-frequency = <400000000>;
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#clock-cells = <0>;
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};
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gpu_cfg_clk: gpu-cfg-clk {
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compatible = "fixed-clock";
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clock-frequency = <200000000>;
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#clock-cells = <0>;
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};
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dmac_core_clk: dmac-core-clk {
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compatible = "fixed-clock";
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clock-frequency = <400000000>;
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@ -187,6 +204,7 @@
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interrupt-names = "macirq";
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phy-mode = "rgmii";
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snps,pbl = <32>;
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snps,multicast-filter-bins = <256>;
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clocks = <&gmacclk>;
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clock-names = "stmmaceth";
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phy-handle = <&phy0>;
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@ -195,15 +213,15 @@
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mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
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dma-coherent;
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tx-fifo-depth = <4096>;
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rx-fifo-depth = <4096>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <0>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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};
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};
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};
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@ -237,6 +255,14 @@
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dma-coherent;
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};
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creg_gpio: gpio@14b0 {
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compatible = "snps,creg-gpio-hsdk";
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reg = <0x14b0 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <2>;
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};
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gpio: gpio@3000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0x3000 0x20>;
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@ -252,6 +278,17 @@
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};
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};
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gpu_3d: gpu@90000 {
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compatible = "vivante,gc";
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reg = <0x90000 0x4000>;
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clocks = <&gpu_dma_clk>,
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<&gpu_cfg_clk>,
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<&gpu_core_clk>,
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<&gpu_core_clk>;
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clock-names = "bus", "reg", "core", "shader";
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interrupts = <28>;
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};
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dmac: dmac@80000 {
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compatible = "snps,axi-dma-1.01a";
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reg = <0x80000 0x400>;
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@ -49,10 +49,12 @@ CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_GPIO_DWAPB=y
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CONFIG_GPIO_SNPS_CREG=y
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# CONFIG_HWMON is not set
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CONFIG_DRM=y
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# CONFIG_DRM_FBDEV_EMULATION is not set
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CONFIG_DRM_UDL=y
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CONFIG_DRM_ETNAVIV=y
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CONFIG_FB=y
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CONFIG_FRAMEBUFFER_CONSOLE=y
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CONFIG_USB_EHCI_HCD=y
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@ -64,7 +66,6 @@ CONFIG_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_PLTFM=y
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CONFIG_MMC_DW=y
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# CONFIG_IOMMU_SUPPORT is not set
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CONFIG_EXT3_FS=y
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CONFIG_VFAT_FS=y
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CONFIG_TMPFS=y
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@ -92,8 +92,11 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
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#endif /* CONFIG_ARC_HAS_LLSC */
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#define cmpxchg(ptr, o, n) ((typeof(*(ptr)))__cmpxchg((ptr), \
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(unsigned long)(o), (unsigned long)(n)))
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#define cmpxchg(ptr, o, n) ({ \
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(typeof(*(ptr)))__cmpxchg((ptr), \
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(unsigned long)(o), \
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(unsigned long)(n)); \
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})
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/*
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* atomic_cmpxchg is same as cmpxchg
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@ -198,8 +201,11 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr,
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return __xchg_bad_pointer();
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}
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#define xchg(ptr, with) ((typeof(*(ptr)))__xchg((unsigned long)(with), (ptr), \
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sizeof(*(ptr))))
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#define xchg(ptr, with) ({ \
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(typeof(*(ptr)))__xchg((unsigned long)(with), \
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(ptr), \
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sizeof(*(ptr))); \
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})
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#endif /* CONFIG_ARC_PLAT_EZNPS */
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@ -66,7 +66,7 @@ void do_page_fault(unsigned long address, struct pt_regs *regs)
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struct vm_area_struct *vma = NULL;
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struct task_struct *tsk = current;
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struct mm_struct *mm = tsk->mm;
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int si_code = 0;
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int si_code = SEGV_MAPERR;
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int ret;
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vm_fault_t fault;
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int write = regs->ecr_cause & ECR_C_PROTV_STORE; /* ST/EX */
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@ -81,16 +81,14 @@ void do_page_fault(unsigned long address, struct pt_regs *regs)
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* only copy the information from the master page table,
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* nothing more.
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*/
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if (address >= VMALLOC_START) {
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if (address >= VMALLOC_START && !user_mode(regs)) {
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ret = handle_kernel_vaddr_fault(address);
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if (unlikely(ret))
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goto bad_area_nosemaphore;
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goto no_context;
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else
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return;
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}
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si_code = SEGV_MAPERR;
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/*
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* If we're in an interrupt or have no user
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* context, we must not take the fault..
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@ -198,7 +196,6 @@ good_area:
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bad_area:
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up_read(&mm->mmap_sem);
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bad_area_nosemaphore:
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/* User mode accesses just cause a SIGSEGV */
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if (user_mode(regs)) {
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tsk->thread.fault_address = address;
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@ -911,9 +911,11 @@ void do_tlb_overlap_fault(unsigned long cause, unsigned long address,
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struct pt_regs *regs)
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{
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struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu;
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unsigned int pd0[mmu->ways];
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unsigned long flags;
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int set;
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int set, n_ways = mmu->ways;
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n_ways = min(n_ways, 4);
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BUG_ON(mmu->ways > 4);
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local_irq_save(flags);
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@ -921,9 +923,10 @@ void do_tlb_overlap_fault(unsigned long cause, unsigned long address,
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for (set = 0; set < mmu->sets; set++) {
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int is_valid, way;
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unsigned int pd0[4];
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/* read out all the ways of current set */
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for (way = 0, is_valid = 0; way < mmu->ways; way++) {
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for (way = 0, is_valid = 0; way < n_ways; way++) {
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write_aux_reg(ARC_REG_TLBINDEX,
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SET_WAY_TO_IDX(mmu, set, way));
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write_aux_reg(ARC_REG_TLBCOMMAND, TLBRead);
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@ -937,14 +940,14 @@ void do_tlb_overlap_fault(unsigned long cause, unsigned long address,
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continue;
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/* Scan the set for duplicate ways: needs a nested loop */
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for (way = 0; way < mmu->ways - 1; way++) {
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for (way = 0; way < n_ways - 1; way++) {
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int n;
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if (!pd0[way])
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continue;
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for (n = way + 1; n < mmu->ways; n++) {
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for (n = way + 1; n < n_ways; n++) {
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if (pd0[way] != pd0[n])
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continue;
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