[POWERPC] 85xx: Port STX GP3 board over from arch/ppc
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
parent
7858f7477e
commit
77e03a2241
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@ -0,0 +1,228 @@
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/*
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* STX GP3 - 8560 ADS Device Tree Source
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*
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* Copyright 2008 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "stx,gp3";
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compatible = "stx,gp3-8560", "stx,gp3";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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pci0 = &pci0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8560@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <32768>;
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i-cache-size = <32768>;
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x10000000>;
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};
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soc8560@fdf00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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ranges = <0 0xfdf00000 0x100000>;
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reg = <0xfdf00000 0x1000>;
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bus-frequency = <0>;
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compatible = "fsl,mpc8560-immr", "simple-bus";
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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};
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l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>;
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cache-size = <0x40000>; // L2, 256K
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interrupt-parent = <&mpic>;
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interrupts = <16 2>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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};
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mdio@24520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <0x24520 0x20>;
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phy2: ethernet-phy@2 {
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interrupt-parent = <&mpic>;
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interrupts = <5 4>;
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reg = <2>;
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device_type = "ethernet-phy";
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};
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phy4: ethernet-phy@4 {
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interrupt-parent = <&mpic>;
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interrupts = <5 4>;
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reg = <4>;
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device_type = "ethernet-phy";
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};
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};
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enet0: ethernet@24000 {
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cell-index = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <29 2 30 2 34 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy2>;
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};
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enet1: ethernet@25000 {
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cell-index = <1>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <35 2 36 2 40 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy4>;
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};
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mpic: pic@40000 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x40000 0x40000>;
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device_type = "open-pic";
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};
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cpm@919c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
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reg = <0x919c0 0x30>;
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ranges;
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muram@80000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x80000 0x10000>;
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data@0 {
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compatible = "fsl,cpm-muram-data";
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reg = <0 0x4000 0x9000 0x2000>;
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};
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};
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brg@919f0 {
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compatible = "fsl,mpc8560-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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reg = <0x919f0 0x10 0x915f0 0x10>;
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clock-frequency = <0>;
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};
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cpmpic: pic@90c00 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <46 2>;
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interrupt-parent = <&mpic>;
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reg = <0x90c00 0x80>;
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compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
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};
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serial0: serial@91a20 {
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device_type = "serial";
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compatible = "fsl,mpc8560-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <0x91a20 0x20 0x88100 0x100>;
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fsl,cpm-brg = <2>;
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fsl,cpm-command = <0x4a00000>;
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interrupts = <41 8>;
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interrupt-parent = <&cpmpic>;
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};
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};
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};
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pci0: pci@fdf08000 {
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cell-index = <0>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x0c */
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0x6000 0 0 1 &mpic 1 1
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0x6000 0 0 2 &mpic 2 1
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0x6000 0 0 3 &mpic 3 1
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0x6000 0 0 4 &mpic 4 1
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/* IDSEL 0x0d */
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0x6800 0 0 1 &mpic 4 1
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0x6800 0 0 2 &mpic 1 1
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0x6800 0 0 3 &mpic 2 1
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0x6800 0 0 4 &mpic 3 1
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/* IDSEL 0x0e */
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0x7000 0 0 1 &mpic 3 1
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0x7000 0 0 2 &mpic 4 1
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0x7000 0 0 3 &mpic 1 1
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0x7000 0 0 4 &mpic 2 1
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/* IDSEL 0x0f */
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0x7800 0 0 1 &mpic 2 1
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0x7800 0 0 2 &mpic 3 1
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0x7800 0 0 3 &mpic 4 1
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0x7800 0 0 4 &mpic 1 1>;
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interrupt-parent = <&mpic>;
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interrupts = <24 2>;
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bus-range = <0 0>;
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ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
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0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xfdf08000 0x1000>;
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compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
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device_type = "pci";
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};
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};
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File diff suppressed because it is too large
Load Diff
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@ -38,6 +38,14 @@ config MPC85xx_DS
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help
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This option enables support for the MPC85xx DS (MPC8544 DS) board
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config STX_GP3
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bool "Silicon Turnkey Express GP3"
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help
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This option enables support for the Silicon Turnkey Express GP3
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board.
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select DEFAULT_UIMAGE
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select PPC_CPM_NEW_BINDING
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endchoice
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config MPC8540
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@ -49,7 +57,7 @@ config MPC8540
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config MPC8560
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bool
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select CPM2
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default y if MPC8560_ADS
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default y if MPC8560_ADS || STX_GP3
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config MPC85xx
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bool
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@ -59,4 +67,4 @@ config MPC85xx
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select FSL_PCI if PCI
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select SERIAL_8250_SHARE_IRQ if SERIAL_8250
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default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \
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|| MPC85xx_MDS || MPC85xx_DS
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|| MPC85xx_MDS || MPC85xx_DS || STX_GP3
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@ -6,3 +6,4 @@ obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
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obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
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obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
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obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
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obj-$(CONFIG_STX_GP3) += stx_gp3.o
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@ -0,0 +1,187 @@
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/*
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* Based on MPC8560 ADS and arch/ppc stx_gp3 ports
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* Copyright 2008 Freescale Semiconductor Inc.
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*
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* Dan Malek <dan@embeddededge.com>
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* Copyright 2004 Embedded Edge, LLC
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*
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* Copied from mpc8560_ads.c
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* Copyright 2002, 2003 Motorola Inc.
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*
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* Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
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* Copyright 2004-2005 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of_platform.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpic.h>
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#include <asm/prom.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#ifdef CONFIG_CPM2
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#include <asm/cpm2.h>
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#include <sysdev/cpm2_pic.h>
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static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
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{
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int cascade_irq;
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while ((cascade_irq = cpm2_get_irq()) >= 0)
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generic_handle_irq(cascade_irq);
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desc->chip->eoi(irq);
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}
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#endif /* CONFIG_CPM2 */
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static void __init stx_gp3_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np;
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#ifdef CONFIG_CPM2
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int irq;
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#endif
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np = of_find_node_by_type(NULL, "open-pic");
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if (!np) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Could not map mpic register space\n");
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of_node_put(np);
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return;
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}
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_init(mpic);
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#ifdef CONFIG_CPM2
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/* Setup CPM2 PIC */
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np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
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if (np == NULL) {
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printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
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return;
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}
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irq = irq_of_parse_and_map(np, 0);
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if (irq == NO_IRQ) {
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of_node_put(np);
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printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
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return;
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}
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cpm2_pic_init(np);
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of_node_put(np);
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set_irq_chained_handler(irq, cpm2_cascade);
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#endif
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}
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/*
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* Setup the architecture
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*/
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static void __init stx_gp3_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *np;
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#endif
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if (ppc_md.progress)
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ppc_md.progress("stx_gp3_setup_arch()", 0);
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#ifdef CONFIG_CPM2
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cpm2_reset();
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#endif
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#ifdef CONFIG_PCI
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for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
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fsl_add_bridge(np, 1);
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#endif
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}
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static void stx_gp3_show_cpuinfo(struct seq_file *m)
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{
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uint pvid, svid, phid1;
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uint memsize = total_memory;
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pvid = mfspr(SPRN_PVR);
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svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
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seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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/* Display cpu Pll setting */
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phid1 = mfspr(SPRN_HID1);
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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/* Display the amount of memory */
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seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
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}
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static struct of_device_id __initdata of_bus_ids[] = {
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{ .name = "soc", },
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{ .type = "soc", },
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{ .name = "cpm", },
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{ .name = "localbus", },
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{ .compatible = "simple-bus", },
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{},
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};
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static int __init declare_of_platform_devices(void)
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{
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of_platform_bus_probe(NULL, of_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(stx_gp3, declare_of_platform_devices);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init stx_gp3_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return of_flat_dt_is_compatible(root, "stx,gp3-8560");
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}
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define_machine(stx_gp3) {
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.name = "STX GP3",
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.probe = stx_gp3_probe,
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.setup_arch = stx_gp3_setup_arch,
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.init_IRQ = stx_gp3_pic_init,
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.show_cpuinfo = stx_gp3_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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