drm/exynos: mic: add MIC driver
MIC(Mobile image compressor) is newly added IP in Exynos5433. MIC resides between decon and mipi dsim, and compresses frame data by 50%. With dsi, not display port, to send frame data to the panel, the bandwidth is not enough. That is why this compressor is introduced. Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Hyungwon Hwang
Inki Dae
parent
8ccd0d0ca0
commit
77bbd8914a
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@ -0,0 +1,51 @@
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Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC)
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MIC (mobile image compressor) resides between decon and mipi dsi. Mipi dsi is
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not capable to transfer high resoltuion frame data as decon can send. MIC
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solves this problem by compressing the frame data by 1/2 before it is
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transferred through mipi dsi. The compressed frame data must be uncompressed in
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the panel PCB.
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Required properties:
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- compatible: value should be "samsung,exynos5433-mic".
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- reg: physical base address and length of the MIC registers set and system
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register of mic.
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- clocks: must include clock specifiers corresponding to entries in the
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clock-names property.
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- clock-names: list of clock names sorted in the same order as the clocks
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property. Must contain "pclk_mic0", "sclk_rgb_vclk_to_mic0".
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- samsung,disp-syscon: the reference node for syscon for DISP block.
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- ports: contains a port which is connected to decon node and dsi node.
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address-cells and size-cells must 1 and 0, respectively.
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- port: contains an endpoint node which is connected to the endpoint in the
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decon node or dsi node. The reg value must be 0 and 1 respectively.
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Example:
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SoC specific DT entry:
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mic: mic@13930000 {
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compatible = "samsung,exynos5433-mic";
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reg = <0x13930000 0x48>;
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clocks = <&cmu_disp CLK_PCLK_MIC0>,
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<&cmu_disp CLK_SCLK_RGB_VCLK_TO_MIC0>;
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clock-names = "pclk_mic0", "sclk_rgb_vclk_to_mic0";
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samsung,disp-syscon = <&syscon_disp>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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mic_to_decon: endpoint {
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remote-endpoint = <&decon_to_mic>;
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};
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};
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port@1 {
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reg = <1>;
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mic_to_dsi: endpoint {
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remote-endpoint = <&dsi_to_mic>;
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};
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};
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};
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};
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@ -103,3 +103,9 @@ config DRM_EXYNOS_GSC
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depends on DRM_EXYNOS_IPP && ARCH_EXYNOS5 && !ARCH_MULTIPLATFORM
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help
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Choose this option if you want to use Exynos GSC for DRM.
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config DRM_EXYNOS_MIC
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bool "Exynos DRM MIC"
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depends on (DRM_EXYNOS && DRM_EXYNOS5433_DECON)
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help
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Choose this option if you want to use Exynos MIC for DRM.
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@ -22,5 +22,6 @@ exynosdrm-$(CONFIG_DRM_EXYNOS_IPP) += exynos_drm_ipp.o
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exynosdrm-$(CONFIG_DRM_EXYNOS_FIMC) += exynos_drm_fimc.o
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exynosdrm-$(CONFIG_DRM_EXYNOS_ROTATOR) += exynos_drm_rotator.o
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exynosdrm-$(CONFIG_DRM_EXYNOS_GSC) += exynos_drm_gsc.o
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exynosdrm-$(CONFIG_DRM_EXYNOS_MIC) += exynos_drm_mic.o
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obj-$(CONFIG_DRM_EXYNOS) += exynosdrm.o
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@ -357,6 +357,9 @@ static struct platform_driver *const exynos_drm_kms_drivers[] = {
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#ifdef CONFIG_DRM_EXYNOS7_DECON
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&decon_driver,
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#endif
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#ifdef CONFIG_DRM_EXYNOS_MIC
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&mic_driver,
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#endif
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#ifdef CONFIG_DRM_EXYNOS_DP
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&dp_driver,
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#endif
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@ -370,9 +373,6 @@ static struct platform_driver *const exynos_drm_kms_drivers[] = {
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};
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static struct platform_driver *const exynos_drm_non_kms_drivers[] = {
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#ifdef CONFIG_DRM_EXYNOS_MIC
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&mic_driver,
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#endif
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#ifdef CONFIG_DRM_EXYNOS_G2D
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&g2d_driver,
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#endif
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@ -314,4 +314,5 @@ extern struct platform_driver fimc_driver;
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extern struct platform_driver rotator_driver;
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extern struct platform_driver gsc_driver;
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extern struct platform_driver ipp_driver;
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extern struct platform_driver mic_driver;
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#endif
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@ -0,0 +1,490 @@
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/*
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* Copyright (C) 2015 Samsung Electronics Co.Ltd
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* Authors:
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* Hyungwon Hwang <human.hwang@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundationr
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*/
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#include <linux/platform_device.h>
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#include <video/of_videomode.h>
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#include <linux/of_address.h>
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#include <video/videomode.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_graph.h>
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#include <linux/clk.h>
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#include <drm/drmP.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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/* Sysreg registers for MIC */
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#define DSD_CFG_MUX 0x1004
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#define MIC0_RGB_MUX (1 << 0)
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#define MIC0_I80_MUX (1 << 1)
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#define MIC0_ON_MUX (1 << 5)
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/* MIC registers */
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#define MIC_OP 0x0
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#define MIC_IP_VER 0x0004
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#define MIC_V_TIMING_0 0x0008
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#define MIC_V_TIMING_1 0x000C
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#define MIC_IMG_SIZE 0x0010
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#define MIC_INPUT_TIMING_0 0x0014
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#define MIC_INPUT_TIMING_1 0x0018
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#define MIC_2D_OUTPUT_TIMING_0 0x001C
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#define MIC_2D_OUTPUT_TIMING_1 0x0020
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#define MIC_2D_OUTPUT_TIMING_2 0x0024
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#define MIC_3D_OUTPUT_TIMING_0 0x0028
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#define MIC_3D_OUTPUT_TIMING_1 0x002C
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#define MIC_3D_OUTPUT_TIMING_2 0x0030
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#define MIC_CORE_PARA_0 0x0034
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#define MIC_CORE_PARA_1 0x0038
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#define MIC_CTC_CTRL 0x0040
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#define MIC_RD_DATA 0x0044
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#define MIC_UPD_REG (1 << 31)
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#define MIC_ON_REG (1 << 30)
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#define MIC_TD_ON_REG (1 << 29)
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#define MIC_BS_CHG_OUT (1 << 16)
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#define MIC_VIDEO_TYPE(x) (((x) & 0xf) << 12)
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#define MIC_PSR_EN (1 << 5)
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#define MIC_SW_RST (1 << 4)
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#define MIC_ALL_RST (1 << 3)
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#define MIC_CORE_VER_CONTROL (1 << 2)
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#define MIC_MODE_SEL_COMMAND_MODE (1 << 1)
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#define MIC_MODE_SEL_MASK (1 << 1)
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#define MIC_CORE_EN (1 << 0)
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#define MIC_V_PULSE_WIDTH(x) (((x) & 0x3fff) << 16)
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#define MIC_V_PERIOD_LINE(x) ((x) & 0x3fff)
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#define MIC_VBP_SIZE(x) (((x) & 0x3fff) << 16)
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#define MIC_VFP_SIZE(x) ((x) & 0x3fff)
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#define MIC_IMG_V_SIZE(x) (((x) & 0x3fff) << 16)
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#define MIC_IMG_H_SIZE(x) ((x) & 0x3fff)
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#define MIC_H_PULSE_WIDTH_IN(x) (((x) & 0x3fff) << 16)
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#define MIC_H_PERIOD_PIXEL_IN(x) ((x) & 0x3fff)
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#define MIC_HBP_SIZE_IN(x) (((x) & 0x3fff) << 16)
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#define MIC_HFP_SIZE_IN(x) ((x) & 0x3fff)
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#define MIC_H_PULSE_WIDTH_2D(x) (((x) & 0x3fff) << 16)
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#define MIC_H_PERIOD_PIXEL_2D(x) ((x) & 0x3fff)
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#define MIC_HBP_SIZE_2D(x) (((x) & 0x3fff) << 16)
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#define MIC_HFP_SIZE_2D(x) ((x) & 0x3fff)
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#define MIC_BS_SIZE_2D(x) ((x) & 0x3fff)
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enum {
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ENDPOINT_DECON_NODE,
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ENDPOINT_DSI_NODE,
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NUM_ENDPOINTS
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};
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static char *clk_names[] = { "pclk_mic0", "sclk_rgb_vclk_to_mic0" };
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#define NUM_CLKS ARRAY_SIZE(clk_names)
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static DEFINE_MUTEX(mic_mutex);
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struct exynos_mic {
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struct device *dev;
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void __iomem *reg;
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struct regmap *sysreg;
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struct clk *clks[NUM_CLKS];
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bool i80_mode;
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struct videomode vm;
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struct drm_encoder *encoder;
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struct drm_bridge bridge;
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bool enabled;
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};
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static void mic_set_path(struct exynos_mic *mic, bool enable)
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{
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int ret;
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unsigned int val;
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ret = regmap_read(mic->sysreg, DSD_CFG_MUX, &val);
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if (ret) {
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DRM_ERROR("mic: Failed to read system register\n");
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return;
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}
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if (enable) {
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if (mic->i80_mode)
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val |= MIC0_I80_MUX;
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else
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val |= MIC0_RGB_MUX;
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val |= MIC0_ON_MUX;
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} else
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val &= ~(MIC0_RGB_MUX | MIC0_I80_MUX | MIC0_ON_MUX);
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regmap_write(mic->sysreg, DSD_CFG_MUX, val);
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if (ret)
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DRM_ERROR("mic: Failed to read system register\n");
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}
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static int mic_sw_reset(struct exynos_mic *mic)
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{
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unsigned int retry = 100;
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int ret;
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writel(MIC_SW_RST, mic->reg + MIC_OP);
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while (retry-- > 0) {
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ret = readl(mic->reg + MIC_OP);
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if (!(ret & MIC_SW_RST))
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return 0;
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udelay(10);
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}
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return -ETIMEDOUT;
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}
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static void mic_set_porch_timing(struct exynos_mic *mic)
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{
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struct videomode vm = mic->vm;
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u32 reg;
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reg = MIC_V_PULSE_WIDTH(vm.vsync_len) +
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MIC_V_PERIOD_LINE(vm.vsync_len + vm.vactive +
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vm.vback_porch + vm.vfront_porch);
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writel(reg, mic->reg + MIC_V_TIMING_0);
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reg = MIC_VBP_SIZE(vm.vback_porch) +
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MIC_VFP_SIZE(vm.vfront_porch);
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writel(reg, mic->reg + MIC_V_TIMING_1);
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reg = MIC_V_PULSE_WIDTH(vm.hsync_len) +
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MIC_V_PERIOD_LINE(vm.hsync_len + vm.hactive +
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vm.hback_porch + vm.hfront_porch);
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writel(reg, mic->reg + MIC_INPUT_TIMING_0);
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reg = MIC_VBP_SIZE(vm.hback_porch) +
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MIC_VFP_SIZE(vm.hfront_porch);
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writel(reg, mic->reg + MIC_INPUT_TIMING_1);
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}
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static void mic_set_img_size(struct exynos_mic *mic)
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{
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struct videomode *vm = &mic->vm;
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u32 reg;
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reg = MIC_IMG_H_SIZE(vm->hactive) +
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MIC_IMG_V_SIZE(vm->vactive);
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writel(reg, mic->reg + MIC_IMG_SIZE);
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}
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static void mic_set_output_timing(struct exynos_mic *mic)
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{
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struct videomode vm = mic->vm;
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u32 reg, bs_size_2d;
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DRM_DEBUG("w: %u, h: %u\n", vm.hactive, vm.vactive);
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bs_size_2d = ((vm.hactive >> 2) << 1) + (vm.vactive % 4);
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reg = MIC_BS_SIZE_2D(bs_size_2d);
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writel(reg, mic->reg + MIC_2D_OUTPUT_TIMING_2);
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if (!mic->i80_mode) {
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reg = MIC_H_PULSE_WIDTH_2D(vm.hsync_len) +
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MIC_H_PERIOD_PIXEL_2D(vm.hsync_len + bs_size_2d +
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vm.hback_porch + vm.hfront_porch);
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writel(reg, mic->reg + MIC_2D_OUTPUT_TIMING_0);
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reg = MIC_HBP_SIZE_2D(vm.hback_porch) +
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MIC_H_PERIOD_PIXEL_2D(vm.hfront_porch);
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writel(reg, mic->reg + MIC_2D_OUTPUT_TIMING_1);
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}
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}
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static void mic_set_reg_on(struct exynos_mic *mic, bool enable)
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{
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u32 reg = readl(mic->reg + MIC_OP);
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if (enable) {
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reg &= ~(MIC_MODE_SEL_MASK | MIC_CORE_VER_CONTROL | MIC_PSR_EN);
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reg |= (MIC_CORE_EN | MIC_BS_CHG_OUT | MIC_ON_REG);
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reg &= ~MIC_MODE_SEL_COMMAND_MODE;
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if (mic->i80_mode)
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reg |= MIC_MODE_SEL_COMMAND_MODE;
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} else {
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reg &= ~MIC_CORE_EN;
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}
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reg |= MIC_UPD_REG;
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writel(reg, mic->reg + MIC_OP);
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}
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static struct device_node *get_remote_node(struct device_node *from, int reg)
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{
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struct device_node *endpoint = NULL, *remote_node = NULL;
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endpoint = of_graph_get_endpoint_by_regs(from, reg, -1);
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if (!endpoint) {
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DRM_ERROR("mic: Failed to find remote port from %s",
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from->full_name);
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goto exit;
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}
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remote_node = of_graph_get_remote_port_parent(endpoint);
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if (!remote_node) {
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DRM_ERROR("mic: Failed to find remote port parent from %s",
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from->full_name);
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goto exit;
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}
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exit:
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of_node_put(endpoint);
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return remote_node;
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}
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static int parse_dt(struct exynos_mic *mic)
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{
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int ret = 0, i, j;
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struct device_node *remote_node;
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struct device_node *nodes[3];
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/*
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* The order of endpoints does matter.
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* The first node must be for decon and the second one must be for dsi.
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*/
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for (i = 0, j = 0; i < NUM_ENDPOINTS; i++) {
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remote_node = get_remote_node(mic->dev->of_node, i);
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if (!remote_node) {
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ret = -EPIPE;
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goto exit;
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}
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nodes[j++] = remote_node;
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switch (i) {
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case ENDPOINT_DECON_NODE:
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/* decon node */
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if (of_get_child_by_name(remote_node,
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"i80-if-timings"))
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mic->i80_mode = 1;
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break;
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case ENDPOINT_DSI_NODE:
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/* panel node */
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remote_node = get_remote_node(remote_node, 1);
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if (!remote_node) {
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ret = -EPIPE;
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goto exit;
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}
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nodes[j++] = remote_node;
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ret = of_get_videomode(remote_node,
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&mic->vm, 0);
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if (ret) {
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DRM_ERROR("mic: failed to get videomode");
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goto exit;
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}
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break;
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default:
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DRM_ERROR("mic: Unknown endpoint from MIC");
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break;
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}
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}
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exit:
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while (--j > -1)
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of_node_put(nodes[j]);
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return ret;
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}
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void mic_disable(struct drm_bridge *bridge) { }
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void mic_post_disable(struct drm_bridge *bridge)
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{
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struct exynos_mic *mic = bridge->driver_private;
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int i;
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mutex_lock(&mic_mutex);
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if (!mic->enabled)
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goto already_disabled;
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mic_set_path(mic, 0);
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for (i = NUM_CLKS - 1; i > -1; i--)
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clk_disable_unprepare(mic->clks[i]);
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mic->enabled = 0;
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already_disabled:
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mutex_unlock(&mic_mutex);
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}
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void mic_pre_enable(struct drm_bridge *bridge)
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{
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struct exynos_mic *mic = bridge->driver_private;
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int ret, i;
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mutex_lock(&mic_mutex);
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if (mic->enabled)
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goto already_enabled;
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for (i = 0; i < NUM_CLKS; i++) {
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ret = clk_prepare_enable(mic->clks[i]);
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if (ret < 0) {
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DRM_ERROR("Failed to enable clock (%s)\n",
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clk_names[i]);
|
||||
goto turn_off_clks;
|
||||
}
|
||||
}
|
||||
|
||||
mic_set_path(mic, 1);
|
||||
|
||||
ret = mic_sw_reset(mic);
|
||||
if (ret) {
|
||||
DRM_ERROR("Failed to reset\n");
|
||||
goto turn_off_clks;
|
||||
}
|
||||
|
||||
if (!mic->i80_mode)
|
||||
mic_set_porch_timing(mic);
|
||||
mic_set_img_size(mic);
|
||||
mic_set_output_timing(mic);
|
||||
mic_set_reg_on(mic, 1);
|
||||
mic->enabled = 1;
|
||||
mutex_unlock(&mic_mutex);
|
||||
|
||||
return;
|
||||
|
||||
turn_off_clks:
|
||||
while (--i > -1)
|
||||
clk_disable_unprepare(mic->clks[i]);
|
||||
already_enabled:
|
||||
mutex_unlock(&mic_mutex);
|
||||
}
|
||||
|
||||
void mic_enable(struct drm_bridge *bridge) { }
|
||||
|
||||
void mic_destroy(struct drm_bridge *bridge)
|
||||
{
|
||||
struct exynos_mic *mic = bridge->driver_private;
|
||||
int i;
|
||||
|
||||
mutex_lock(&mic_mutex);
|
||||
if (!mic->enabled)
|
||||
goto already_disabled;
|
||||
|
||||
for (i = NUM_CLKS - 1; i > -1; i--)
|
||||
clk_disable_unprepare(mic->clks[i]);
|
||||
|
||||
already_disabled:
|
||||
mutex_unlock(&mic_mutex);
|
||||
}
|
||||
|
||||
struct drm_bridge_funcs mic_bridge_funcs = {
|
||||
.disable = mic_disable,
|
||||
.post_disable = mic_post_disable,
|
||||
.pre_enable = mic_pre_enable,
|
||||
.enable = mic_enable,
|
||||
};
|
||||
|
||||
int exynos_mic_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct exynos_mic *mic;
|
||||
struct resource res;
|
||||
int ret, i;
|
||||
|
||||
mic = devm_kzalloc(dev, sizeof(*mic), GFP_KERNEL);
|
||||
if (!mic) {
|
||||
DRM_ERROR("mic: Failed to allocate memory for MIC object\n");
|
||||
ret = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
mic->dev = dev;
|
||||
|
||||
ret = parse_dt(mic);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = of_address_to_resource(dev->of_node, 0, &res);
|
||||
if (ret) {
|
||||
DRM_ERROR("mic: Failed to get mem region for MIC\n");
|
||||
goto err;
|
||||
}
|
||||
mic->reg = devm_ioremap(dev, res.start, resource_size(&res));
|
||||
if (!mic->reg) {
|
||||
DRM_ERROR("mic: Failed to remap for MIC\n");
|
||||
ret = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
mic->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node,
|
||||
"samsung,disp-syscon");
|
||||
if (IS_ERR(mic->sysreg)) {
|
||||
DRM_ERROR("mic: Failed to get system register.\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
mic->bridge.funcs = &mic_bridge_funcs;
|
||||
mic->bridge.of_node = dev->of_node;
|
||||
mic->bridge.driver_private = mic;
|
||||
ret = drm_bridge_add(&mic->bridge);
|
||||
if (ret) {
|
||||
DRM_ERROR("mic: Failed to add MIC to the global bridge list\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
for (i = 0; i < NUM_CLKS; i++) {
|
||||
mic->clks[i] = of_clk_get_by_name(dev->of_node, clk_names[i]);
|
||||
if (IS_ERR(mic->clks[i])) {
|
||||
DRM_ERROR("mic: Failed to get clock (%s)\n",
|
||||
clk_names[i]);
|
||||
ret = PTR_ERR(mic->clks[i]);
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
|
||||
DRM_DEBUG_KMS("MIC has been probed\n");
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int exynos_mic_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct exynos_mic *mic = platform_get_drvdata(pdev);
|
||||
int i;
|
||||
|
||||
drm_bridge_remove(&mic->bridge);
|
||||
|
||||
for (i = NUM_CLKS - 1; i > -1; i--)
|
||||
clk_put(mic->clks[i]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id exynos_mic_of_match[] = {
|
||||
{ .compatible = "samsung,exynos5433-mic" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, exynos_mic_of_match);
|
||||
|
||||
struct platform_driver mic_driver = {
|
||||
.probe = exynos_mic_probe,
|
||||
.remove = exynos_mic_remove,
|
||||
.driver = {
|
||||
.name = "exynos-mic",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = exynos_mic_of_match,
|
||||
},
|
||||
};
|
||||
Loading…
Reference in New Issue