ASoC: es8328: Support more sample formats
The values are the same for the DAC and ADC so remove the specific values and use values with shifts. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -60,7 +60,11 @@ static const char * const supply_names[ES8328_SUPPLY_NUM] = {
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#define ES8328_RATES (SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_22050 | \
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SNDRV_PCM_RATE_11025)
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#define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
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#define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S18_3LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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struct es8328_priv {
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struct regmap *regmap;
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@ -449,6 +453,7 @@ static int es8328_hw_params(struct snd_pcm_substream *substream,
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int i;
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int reg;
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int val;
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int wl;
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u8 ratio;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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@ -470,10 +475,28 @@ static int es8328_hw_params(struct snd_pcm_substream *substream,
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ES8328_SYSCLK_RATE_1X, ES8328_SYSCLK_RATE_2X);
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return -EINVAL;
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}
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ret = snd_soc_update_bits(codec, ES8328_MASTERMODE,
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snd_soc_update_bits(codec, ES8328_MASTERMODE,
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ES8328_MASTERMODE_MCLKDIV2, val);
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if (ret < 0)
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return ret;
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switch (params_width(params)) {
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case 16:
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wl = 3;
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break;
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case 18:
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wl = 2;
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break;
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case 20:
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wl = 1;
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break;
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case 24:
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wl = 0;
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break;
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case 32:
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wl = 4;
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break;
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default:
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return -EINVAL;
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}
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/* find master mode MCLK to sampling frequency ratio */
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ratio = mclk_ratios[0].rate;
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@ -484,14 +507,14 @@ static int es8328_hw_params(struct snd_pcm_substream *substream,
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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snd_soc_update_bits(codec, ES8328_DACCONTROL1,
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ES8328_DACCONTROL1_DACWL_MASK,
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ES8328_DACCONTROL1_DACWL_16);
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wl << ES8328_DACCONTROL1_DACWL_SHIFT);
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es8328->playback_fs = params_rate(params);
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es8328_set_deemph(codec);
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} else
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snd_soc_update_bits(codec, ES8328_ADCCONTROL4,
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ES8328_ADCCONTROL4_ADCWL_MASK,
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ES8328_ADCCONTROL4_ADCWL_16);
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wl << ES8328_ADCCONTROL4_ADCWL_SHIFT);
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return snd_soc_update_bits(codec, reg, ES8328_RATEMASK, ratio);
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}
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@ -91,11 +91,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap);
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#define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0)
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#define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0)
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#define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0)
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#define ES8328_ADCCONTROL4_ADCWL_24 (0 << 2)
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#define ES8328_ADCCONTROL4_ADCWL_20 (1 << 2)
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#define ES8328_ADCCONTROL4_ADCWL_18 (2 << 2)
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#define ES8328_ADCCONTROL4_ADCWL_16 (3 << 2)
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#define ES8328_ADCCONTROL4_ADCWL_32 (4 << 2)
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#define ES8328_ADCCONTROL4_ADCWL_SHIFT 2
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#define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2)
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#define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5)
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#define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5)
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@ -131,11 +127,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap);
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#define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1)
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#define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1)
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#define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1)
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#define ES8328_DACCONTROL1_DACWL_24 (0 << 3)
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#define ES8328_DACCONTROL1_DACWL_20 (1 << 3)
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#define ES8328_DACCONTROL1_DACWL_18 (2 << 3)
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#define ES8328_DACCONTROL1_DACWL_16 (3 << 3)
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#define ES8328_DACCONTROL1_DACWL_32 (4 << 3)
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#define ES8328_DACCONTROL1_DACWL_SHIFT 3
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#define ES8328_DACCONTROL1_DACWL_MASK (7 << 3)
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#define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6)
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#define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6)
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