[Blackfin] arch: Give the DMA base registers a more descriptive name

The DMA base registers are available in a global named "base_addr" for
every Blackfin variant. Give this a more descriptive name, and remove
duplicate tables from some drivers.

Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Bernd Schmidt 2008-04-24 05:31:18 +08:00 committed by Bryan Wu
parent ac86a97853
commit 7795566495
12 changed files with 14 additions and 25 deletions

View File

@ -67,7 +67,7 @@ static int __init blackfin_dma_init(void)
for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) { for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
dma_ch[i].chan_status = DMA_CHANNEL_FREE; dma_ch[i].chan_status = DMA_CHANNEL_FREE;
dma_ch[i].regs = base_addr[i]; dma_ch[i].regs = dma_io_base_addr[i];
mutex_init(&(dma_ch[i].dmalock)); mutex_init(&(dma_ch[i].dmalock));
} }
/* Mark MEMDMA Channel 0 as requested since we're using it internally */ /* Mark MEMDMA Channel 0 as requested since we're using it internally */

View File

@ -31,7 +31,7 @@
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/dma.h> #include <asm/dma.h>
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR, (struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR, (struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR, (struct dma_register *) DMA2_NEXT_DESC_PTR,
@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) MDMA_D1_NEXT_DESC_PTR, (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S1_NEXT_DESC_PTR, (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
}; };
EXPORT_SYMBOL(base_addr); EXPORT_SYMBOL(dma_io_base_addr);
int channel2irq(unsigned int channel) int channel2irq(unsigned int channel)
{ {

View File

@ -31,7 +31,7 @@
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/dma.h> #include <asm/dma.h>
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR, (struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR, (struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR, (struct dma_register *) DMA2_NEXT_DESC_PTR,
@ -45,7 +45,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) MDMA_D1_NEXT_DESC_PTR, (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S1_NEXT_DESC_PTR, (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
}; };
EXPORT_SYMBOL(base_addr); EXPORT_SYMBOL(dma_io_base_addr);
int channel2irq(unsigned int channel) int channel2irq(unsigned int channel)
{ {

View File

@ -31,7 +31,7 @@
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/dma.h> #include <asm/dma.h>
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR, (struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR, (struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR, (struct dma_register *) DMA2_NEXT_DESC_PTR,
@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) MDMA_D1_NEXT_DESC_PTR, (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S1_NEXT_DESC_PTR, (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
}; };
EXPORT_SYMBOL(base_addr); EXPORT_SYMBOL(dma_io_base_addr);
int channel2irq(unsigned int channel) int channel2irq(unsigned int channel)
{ {

View File

@ -32,7 +32,7 @@
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/dma.h> #include <asm/dma.h>
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR, (struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR, (struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR, (struct dma_register *) DMA2_NEXT_DESC_PTR,
@ -66,7 +66,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) MDMA_D3_NEXT_DESC_PTR, (struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S3_NEXT_DESC_PTR, (struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
}; };
EXPORT_SYMBOL(base_addr); EXPORT_SYMBOL(dma_io_base_addr);
int channel2irq(unsigned int channel) int channel2irq(unsigned int channel)
{ {

View File

@ -31,7 +31,7 @@
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/dma.h> #include <asm/dma.h>
struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = { struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) DMA1_0_NEXT_DESC_PTR, (struct dma_register *) DMA1_0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_1_NEXT_DESC_PTR, (struct dma_register *) DMA1_1_NEXT_DESC_PTR,
(struct dma_register *) DMA1_2_NEXT_DESC_PTR, (struct dma_register *) DMA1_2_NEXT_DESC_PTR,
@ -69,7 +69,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
(struct dma_register *) IMDMA_D1_NEXT_DESC_PTR, (struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
(struct dma_register *) IMDMA_S1_NEXT_DESC_PTR, (struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
}; };
EXPORT_SYMBOL(base_addr); EXPORT_SYMBOL(dma_io_base_addr);
int channel2irq(unsigned int channel) int channel2irq(unsigned int channel)
{ {

View File

@ -191,4 +191,7 @@ void clear_dma_irqstat(unsigned int channel);
void *dma_memcpy(void *dest, const void *src, size_t count); void *dma_memcpy(void *dest, const void *src, size_t count);
void *safe_dma_memcpy(void *dest, const void *src, size_t count); void *safe_dma_memcpy(void *dest, const void *src, size_t count);
extern int channel2irq(unsigned int channel);
extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
#endif #endif

View File

@ -59,7 +59,4 @@
#define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */ #define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */
#endif #endif
extern int channel2irq(unsigned int channel);
extern struct dma_register *base_addr[];
#endif #endif

View File

@ -51,7 +51,4 @@
#define CH_MEM_STREAM1_DEST 10 /* TX */ #define CH_MEM_STREAM1_DEST 10 /* TX */
#define CH_MEM_STREAM1_SRC 11 /* RX */ #define CH_MEM_STREAM1_SRC 11 /* RX */
extern int channel2irq(unsigned int channel);
extern struct dma_register *base_addr[];
#endif #endif

View File

@ -52,7 +52,4 @@
#define CH_MEM_STREAM1_DEST 14 /* TX */ #define CH_MEM_STREAM1_DEST 14 /* TX */
#define CH_MEM_STREAM1_SRC 15 /* RX */ #define CH_MEM_STREAM1_SRC 15 /* RX */
extern int channel2irq(unsigned int channel);
extern struct dma_register *base_addr[];
#endif #endif

View File

@ -73,6 +73,4 @@
#define MAX_BLACKFIN_DMA_CHANNEL 32 #define MAX_BLACKFIN_DMA_CHANNEL 32
extern int channel2irq(unsigned int channel);
extern struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL];
#endif #endif

View File

@ -32,7 +32,4 @@
#define CH_IMEM_STREAM1_SRC 34 #define CH_IMEM_STREAM1_SRC 34
#define CH_IMEM_STREAM1_DEST 35 #define CH_IMEM_STREAM1_DEST 35
extern int channel2irq(unsigned int channel);
extern struct dma_register *base_addr[];
#endif #endif