[Blackfin] arch: Give the DMA base registers a more descriptive name
The DMA base registers are available in a global named "base_addr" for every Blackfin variant. Give this a more descriptive name, and remove duplicate tables from some drivers. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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ac86a97853
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7795566495
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@ -67,7 +67,7 @@ static int __init blackfin_dma_init(void)
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for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
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for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
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dma_ch[i].chan_status = DMA_CHANNEL_FREE;
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dma_ch[i].chan_status = DMA_CHANNEL_FREE;
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dma_ch[i].regs = base_addr[i];
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dma_ch[i].regs = dma_io_base_addr[i];
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mutex_init(&(dma_ch[i].dmalock));
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mutex_init(&(dma_ch[i].dmalock));
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}
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}
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/* Mark MEMDMA Channel 0 as requested since we're using it internally */
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/* Mark MEMDMA Channel 0 as requested since we're using it internally */
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@ -31,7 +31,7 @@
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#include <asm/blackfin.h>
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#include <asm/blackfin.h>
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#include <asm/dma.h>
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#include <asm/dma.h>
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struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
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};
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};
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EXPORT_SYMBOL(base_addr);
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EXPORT_SYMBOL(dma_io_base_addr);
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int channel2irq(unsigned int channel)
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int channel2irq(unsigned int channel)
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{
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{
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@ -31,7 +31,7 @@
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#include <asm/blackfin.h>
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#include <asm/blackfin.h>
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#include <asm/dma.h>
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#include <asm/dma.h>
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struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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@ -45,7 +45,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
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};
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};
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EXPORT_SYMBOL(base_addr);
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EXPORT_SYMBOL(dma_io_base_addr);
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int channel2irq(unsigned int channel)
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int channel2irq(unsigned int channel)
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{
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{
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@ -31,7 +31,7 @@
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#include <asm/blackfin.h>
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#include <asm/blackfin.h>
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#include <asm/dma.h>
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#include <asm/dma.h>
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struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
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};
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};
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EXPORT_SYMBOL(base_addr);
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EXPORT_SYMBOL(dma_io_base_addr);
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int channel2irq(unsigned int channel)
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int channel2irq(unsigned int channel)
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{
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{
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@ -32,7 +32,7 @@
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#include <asm/blackfin.h>
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#include <asm/blackfin.h>
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#include <asm/dma.h>
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#include <asm/dma.h>
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struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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@ -66,7 +66,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
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};
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};
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EXPORT_SYMBOL(base_addr);
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EXPORT_SYMBOL(dma_io_base_addr);
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int channel2irq(unsigned int channel)
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int channel2irq(unsigned int channel)
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{
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{
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@ -31,7 +31,7 @@
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#include <asm/blackfin.h>
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#include <asm/blackfin.h>
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#include <asm/dma.h>
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#include <asm/dma.h>
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struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) DMA1_0_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_0_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_1_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_1_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_2_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_2_NEXT_DESC_PTR,
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@ -69,7 +69,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
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(struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
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(struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
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};
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};
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EXPORT_SYMBOL(base_addr);
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EXPORT_SYMBOL(dma_io_base_addr);
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int channel2irq(unsigned int channel)
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int channel2irq(unsigned int channel)
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{
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{
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@ -191,4 +191,7 @@ void clear_dma_irqstat(unsigned int channel);
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void *dma_memcpy(void *dest, const void *src, size_t count);
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void *dma_memcpy(void *dest, const void *src, size_t count);
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void *safe_dma_memcpy(void *dest, const void *src, size_t count);
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void *safe_dma_memcpy(void *dest, const void *src, size_t count);
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
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#endif
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#endif
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@ -59,7 +59,4 @@
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#define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */
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#define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */
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#endif
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#endif
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *base_addr[];
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#endif
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#endif
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@ -51,7 +51,4 @@
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#define CH_MEM_STREAM1_DEST 10 /* TX */
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#define CH_MEM_STREAM1_DEST 10 /* TX */
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#define CH_MEM_STREAM1_SRC 11 /* RX */
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#define CH_MEM_STREAM1_SRC 11 /* RX */
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *base_addr[];
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#endif
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#endif
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@ -52,7 +52,4 @@
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#define CH_MEM_STREAM1_DEST 14 /* TX */
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#define CH_MEM_STREAM1_DEST 14 /* TX */
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#define CH_MEM_STREAM1_SRC 15 /* RX */
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#define CH_MEM_STREAM1_SRC 15 /* RX */
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *base_addr[];
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#endif
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#endif
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@ -73,6 +73,4 @@
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#define MAX_BLACKFIN_DMA_CHANNEL 32
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#define MAX_BLACKFIN_DMA_CHANNEL 32
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL];
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#endif
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#endif
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@ -32,7 +32,4 @@
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#define CH_IMEM_STREAM1_SRC 34
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#define CH_IMEM_STREAM1_SRC 34
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#define CH_IMEM_STREAM1_DEST 35
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#define CH_IMEM_STREAM1_DEST 35
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extern int channel2irq(unsigned int channel);
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extern struct dma_register *base_addr[];
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#endif
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#endif
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