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drm/radeon: enable mgcg on CIK 

Now that the CP is no longer reset and cg is properly
disabled in when appropriate in the dpm code we can
now enable mgcg (medium grained clockgating).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-08-14 18:58:43 -04:00
parent 6500fc0c9f
commit 773dc10a8a
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/radeon/radeon_asic.c
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@ -2439,7 +2439,7 @@ int radeon_asic_init(struct radeon_device *rdev)
rdev->num_crtc = 6;
rdev->has_uvd = true;
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |
@ -2464,7 +2464,7 @@ int radeon_asic_init(struct radeon_device *rdev)
if (rdev->family == CHIP_KAVERI) {
rdev->num_crtc = 4;
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |
@ -2492,7 +2492,7 @@ int radeon_asic_init(struct radeon_device *rdev)
} else {
rdev->num_crtc = 2;
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |