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nvme-pci: limit max_hw_sectors based on the DMA max mapping size 

When running a NVMe device that is attached to a addressing
challenged PCIe root port that requires bounce buffering, our
request sizes can easily overflow the swiotlb bounce buffer
size.  Limit the maximum I/O size to the limit exposed by
the DMA mapping subsystem.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reported-by: Atish Patra <Atish.Patra@wdc.com>
Tested-by: Atish Patra <Atish.Patra@wdc.com>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
This commit is contained in:
Christoph Hellwig 2019-07-03 09:54:44 -07:00
parent bfac8e9f55
commit 7637de311b
1 changed files with 2 additions and 1 deletions
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3
drivers/nvme/host/pci.c
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@ -2503,7 +2503,8 @@ static void nvme_reset_work(struct work_struct *work)
* Limit the max command size to prevent iod->sg allocations going * Limit the max command size to prevent iod->sg allocations going
* over a single page. * over a single page.
*/ */
dev->ctrl.max_hw_sectors = NVME_MAX_KB_SZ << 1; dev->ctrl.max_hw_sectors = min_t(u32,
NVME_MAX_KB_SZ << 1, dma_max_mapping_size(dev->dev) >> 9);
dev->ctrl.max_segments = NVME_MAX_SEGS; dev->ctrl.max_segments = NVME_MAX_SEGS;
/* /*