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Merge branch 'tegra/boards' into next/boards 

* tegra/boards:
  arm/tegra: remove __initdata annotation from pinmux tables
  arm/tegra: Use bus notifiers to trigger pinmux setup
  arm/tegra: Refactor board-*-pinmux.c to share code
  arm/tegra: Fix mistake in Trimslice's pinmux
  arm/tegra: Rework Seaboard-vs-Ventana pinmux table
  arm/tegra: Remove useless entries from ventana_pinmux[]
  arm/tegra: PCIe: Remove include of mach/pinmux.h
  arm/tegra: Harmony PCIe: Don't touch pinmux
  arm/tegra: Add AUXDATA for tegra-pinmux and tegra-gpio
  arm/tegra: Split Seaboard GPIO table to allow for Ventana
  ARM: tegra: paz00: Fix board pinmux table.
  ARM: tegra: paz00: add support for wakeup gpio key
This commit is contained in:
Arnd Bergmann 2011-12-27 23:04:09 +00:00
parent 8df97495c1 16d936213a
commit 75f7dd81dc
12 changed files with 273 additions and 126 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-tegra/Makefile
View File

@ -1,3 +1,4 @@
obj-y += board-pinmux.o
obj-y += common.o
obj-y += devices.o
obj-y += io.o

16
arch/arm/mach-tegra/board-dt.c
View File

@ -51,6 +51,8 @@ void seaboard_pinmux_init(void);
void ventana_pinmux_init(void);
struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
@ -102,13 +104,6 @@ static void __init tegra_dt_init(void)
tegra_clk_init_from_table(tegra_dt_clk_init_table);
/*
* Finished with the static registrations now; fill in the missing
* devices
*/
of_platform_populate(NULL, tegra_dt_match_table,
tegra20_auxdata_lookup, NULL);
for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
if (of_machine_is_compatible(pinmux_configs[i].machine)) {
pinmux_configs[i].init();
@ -118,6 +113,13 @@ static void __init tegra_dt_init(void)
WARN(i == ARRAY_SIZE(pinmux_configs),
"Unknown platform! Pinmuxing not initialized\n");
/*
* Finished with the static registrations now; fill in the missing
* devices
*/
of_platform_populate(NULL, tegra_dt_match_table,
tegra20_auxdata_lookup, NULL);
}
static const char * tegra_dt_board_compat[] = {

9
arch/arm/mach-tegra/board-harmony-pcie.c
View File

@ -22,7 +22,6 @@
#include <asm/mach-types.h>
#include <mach/pinmux.h>
#include "board.h"
#include "board-harmony.h"
@ -48,10 +47,6 @@ static int __init harmony_pcie_init(void)
regulator_enable(regulator);
tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL);
err = tegra_pcie_init(true, true);
if (err)
goto err_pcie;
@ -59,10 +54,6 @@ static int __init harmony_pcie_init(void)
return 0;
err_pcie:
tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_TRISTATE);
tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
regulator_disable(regulator);
regulator_put(regulator);
err_reg:

22
arch/arm/mach-tegra/board-harmony-pinmux.c
View File

@ -22,7 +22,7 @@
#include "gpio-names.h"
#include "board-harmony.h"
#include "devices.h"
#include "board-pinmux.h"
static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@ -143,11 +143,6 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
static struct platform_device *pinmux_devices[] = {
&tegra_gpio_device,
&tegra_pinmux_device,
};
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
{ .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
@ -161,13 +156,14 @@ static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
};
static struct tegra_board_pinmux_conf conf = {
.pgs = harmony_pinmux,
.pg_count = ARRAY_SIZE(harmony_pinmux),
.gpios = gpio_table,
.gpio_count = ARRAY_SIZE(gpio_table),
};
void harmony_pinmux_init(void)
{
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
tegra_board_pinmux_init(&conf, NULL);
}

24
arch/arm/mach-tegra/board-paz00-pinmux.c
View File

@ -22,7 +22,7 @@
#include "gpio-names.h"
#include "board-paz00.h"
#include "devices.h"
#include "board-pinmux.h"
static struct tegra_pingroup_config paz00_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@ -30,7 +30,7 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
{TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
@ -143,11 +143,6 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
static struct platform_device *pinmux_devices[] = {
&tegra_gpio_device,
&tegra_pinmux_device,
};
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
{ .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
@ -158,13 +153,14 @@ static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_WIFI_LED, .enable = true },
};
static struct tegra_board_pinmux_conf conf = {
.pgs = paz00_pinmux,
.pg_count = ARRAY_SIZE(paz00_pinmux),
.gpios = gpio_table,
.gpio_count = ARRAY_SIZE(gpio_table),
};
void paz00_pinmux_init(void)
{
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
tegra_board_pinmux_init(&conf, NULL);
}

27
arch/arm/mach-tegra/board-paz00.c
View File

@ -23,8 +23,10 @@
#include <linux/serial_8250.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/gpio_keys.h>
#include <linux/pda_power.h>
#include <linux/io.h>
#include <linux/input.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/rfkill-gpio.h>
@ -115,12 +117,37 @@ static struct platform_device leds_gpio = {
},
};
static struct gpio_keys_button paz00_gpio_keys_buttons[] = {
{
.code = KEY_POWER,
.gpio = TEGRA_GPIO_POWERKEY,
.active_low = 1,
.desc = "Power",
.type = EV_KEY,
.wakeup = 1,
},
};
static struct gpio_keys_platform_data paz00_gpio_keys = {
.buttons = paz00_gpio_keys_buttons,
.nbuttons = ARRAY_SIZE(paz00_gpio_keys_buttons),
};
static struct platform_device gpio_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &paz00_gpio_keys,
},
};
static struct platform_device *paz00_devices[] __initdata = {
&debug_uart,
&tegra_sdhci_device4,
&tegra_sdhci_device1,
&wifi_rfkill_device,
&leds_gpio,
&gpio_keys_device,
};
static void paz00_i2c_init(void)

3
arch/arm/mach-tegra/board-paz00.h
View File

@ -32,6 +32,9 @@
#define TEGRA_WIFI_RST TEGRA_GPIO_PD1
#define TEGRA_WIFI_LED TEGRA_GPIO_PD0
/* WakeUp */
#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PJ7
void paz00_pinmux_init(void);
#endif

104
arch/arm/mach-tegra/board-pinmux.c Normal file
View File

@ -0,0 +1,104 @@
/*
* Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/notifier.h>
#include <linux/of.h>
#include <linux/string.h>
#include <mach/gpio-tegra.h>
#include <mach/pinmux.h>
#include "board-pinmux.h"
#include "devices.h"
struct tegra_board_pinmux_conf *confs[2];
static void tegra_board_pinmux_setup_gpios(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(confs); i++) {
if (!confs[i])
continue;
tegra_gpio_config(confs[i]->gpios, confs[i]->gpio_count);
}
}
static void tegra_board_pinmux_setup_pinmux(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(confs); i++) {
if (!confs[i])
continue;
tegra_pinmux_config_table(confs[i]->pgs, confs[i]->pg_count);
if (confs[i]->drives)
tegra_drive_pinmux_config_table(confs[i]->drives,
confs[i]->drive_count);
}
}
static int tegra_board_pinmux_bus_notify(struct notifier_block *nb,
unsigned long event, void *vdev)
{
static bool had_gpio;
static bool had_pinmux;
struct device *dev = vdev;
const char *devname;
if (event != BUS_NOTIFY_BOUND_DRIVER)
return NOTIFY_DONE;
devname = dev_name(dev);
if (!had_gpio && !strcmp(devname, GPIO_DEV)) {
tegra_board_pinmux_setup_gpios();
had_gpio = true;
} else if (!had_pinmux && !strcmp(devname, PINMUX_DEV)) {
tegra_board_pinmux_setup_pinmux();
had_pinmux = true;
}
if (had_gpio && had_pinmux)
return NOTIFY_STOP_MASK;
else
return NOTIFY_DONE;
}
static struct notifier_block nb = {
.notifier_call = tegra_board_pinmux_bus_notify,
};
static struct platform_device *devices[] = {
&tegra_gpio_device,
&tegra_pinmux_device,
};
void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
struct tegra_board_pinmux_conf *conf_b)
{
confs[0] = conf_a;
confs[1] = conf_b;
bus_register_notifier(&platform_bus_type, &nb);
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(devices, ARRAY_SIZE(devices));
}

38
arch/arm/mach-tegra/board-pinmux.h Normal file
View File

@ -0,0 +1,38 @@
/*
* Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MACH_TEGRA_BOARD_PINMUX_H
#define __MACH_TEGRA_BOARD_PINMUX_H
#define GPIO_DEV "tegra-gpio"
#define PINMUX_DEV "tegra-pinmux"
struct tegra_pingroup_config;
struct tegra_gpio_table;
struct tegra_board_pinmux_conf {
struct tegra_pingroup_config *pgs;
int pg_count;
struct tegra_drive_pingroup_config *drives;
int drive_count;
struct tegra_gpio_table *gpios;
int gpio_count;
};
void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
struct tegra_board_pinmux_conf *conf_b);
#endif

128
arch/arm/mach-tegra/board-seaboard-pinmux.c
View File

@ -22,8 +22,8 @@
#include <mach/pinmux-t2.h>
#include "gpio-names.h"
#include "board-pinmux.h"
#include "board-seaboard.h"
#include "devices.h"
#define DEFAULT_DRIVE(_name) \
{ \
@ -37,11 +37,11 @@
.slew_falling = TEGRA_SLEW_SLOWEST, \
}
static __initdata struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {
static struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {
DEFAULT_DRIVE(SDIO1),
};
static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
static struct tegra_pingroup_config common_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@ -55,7 +55,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
@ -65,7 +64,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@ -108,13 +106,8 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@ -122,25 +115,19 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@ -160,13 +147,24 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
{TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
static struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
};
static struct tegra_pingroup_config ventana_pinmux[] = {
{TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@ -181,65 +179,59 @@ static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
{TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
};
static struct platform_device *pinmux_devices[] = {
&tegra_gpio_device,
&tegra_pinmux_device,
};
static struct tegra_gpio_table common_gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
{ .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
{ .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
{ .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
};
static struct tegra_gpio_table seaboard_gpio_table[] = {
{ .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
{ .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
{ .gpio = TEGRA_GPIO_HP_DET, .enable = true },
{ .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
{ .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
{ .gpio = TEGRA_GPIO_USB1, .enable = true },
};
static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size)
{
int i, j;
struct tegra_pingroup_config *new_pingroup, *base_pingroup;
static struct tegra_gpio_table ventana_gpio_table[] = {
/* hp_det */
{ .gpio = TEGRA_GPIO_PW2, .enable = true },
/* int_mic_en */
{ .gpio = TEGRA_GPIO_PX0, .enable = true },
/* ext_mic_en */
{ .gpio = TEGRA_GPIO_PX1, .enable = true },
};
/* Update base seaboard pinmux table with secondary board
* specific pinmux table table.
*/
for (i = 0; i < size; i++) {
new_pingroup = &newtbl[i];
for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) {
base_pingroup = &seaboard_pinmux[j];
if (new_pingroup->pingroup == base_pingroup->pingroup) {
*base_pingroup = *new_pingroup;
break;
}
}
}
static struct tegra_board_pinmux_conf common_conf = {
.pgs = common_pinmux,
.pg_count = ARRAY_SIZE(common_pinmux),
.gpios = common_gpio_table,
.gpio_count = ARRAY_SIZE(common_gpio_table),
};
static struct tegra_board_pinmux_conf seaboard_conf = {
.pgs = seaboard_pinmux,
.pg_count = ARRAY_SIZE(seaboard_pinmux),
.drives = seaboard_drive_pinmux,
.drive_count = ARRAY_SIZE(seaboard_drive_pinmux),
.gpios = seaboard_gpio_table,
.gpio_count = ARRAY_SIZE(seaboard_gpio_table),
};
static struct tegra_board_pinmux_conf ventana_conf = {
.pgs = ventana_pinmux,
.pg_count = ARRAY_SIZE(ventana_pinmux),
.gpios = ventana_gpio_table,
.gpio_count = ARRAY_SIZE(ventana_gpio_table),
};
void seaboard_pinmux_init(void)
{
tegra_board_pinmux_init(&common_conf, &seaboard_conf);
}
void __init seaboard_common_pinmux_init(void)
void ventana_pinmux_init(void)
{
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
tegra_drive_pinmux_config_table(seaboard_drive_pinmux,
ARRAY_SIZE(seaboard_drive_pinmux));
tegra_gpio_config(common_gpio_table, ARRAY_SIZE(common_gpio_table));
tegra_board_pinmux_init(&common_conf, &ventana_conf);
}
void __init seaboard_pinmux_init(void)
{
seaboard_common_pinmux_init();
}
void __init ventana_pinmux_init(void)
{
update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux));
seaboard_common_pinmux_init();
}

26
arch/arm/mach-tegra/board-trimslice-pinmux.c
View File

@ -21,10 +21,10 @@
#include <mach/pinmux.h>
#include "gpio-names.h"
#include "board-pinmux.h"
#include "board-trimslice.h"
#include "devices.h"
static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
static struct tegra_pingroup_config trimslice_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@ -105,7 +105,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
{TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_PTA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@ -143,11 +143,6 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
};
static struct platform_device *pinmux_devices[] = {
&tegra_gpio_device,
&tegra_pinmux_device,
};
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
{ .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
@ -156,11 +151,14 @@ static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */
};
void __init trimslice_pinmux_init(void)
static struct tegra_board_pinmux_conf conf = {
.pgs = trimslice_pinmux,
.pg_count = ARRAY_SIZE(trimslice_pinmux),
.gpios = gpio_table,
.gpio_count = ARRAY_SIZE(gpio_table),
};
void trimslice_pinmux_init(void)
{
if (!of_machine_is_compatible("nvidia,tegra20"))
platform_add_devices(pinmux_devices,
ARRAY_SIZE(pinmux_devices));
tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
tegra_board_pinmux_init(&conf, NULL);
}

1
arch/arm/mach-tegra/pcie.c
View File

@ -37,7 +37,6 @@
#include <asm/sizes.h>
#include <asm/mach/pci.h>
#include <mach/pinmux.h>
#include <mach/iomap.h>
#include <mach/clk.h>
#include <mach/powergate.h>