[WATCHDOG] Add support for SB1 hardware watchdog
Support watchdog timers built into SiByte MIPS SoCs. Signed-off-by: Andy Sharp <andy.sharp@onstor.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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@ -633,6 +633,19 @@ config WDT_RM9K_GPI
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To compile this driver as a module, choose M here: the
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module will be called rm9k_wdt.
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config SIBYTE_WDOG
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tristate "Sibyte SoC hardware watchdog"
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depends on CPU_SB1
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help
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Watchdog driver for the built in watchdog hardware in Sibyte
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SoC processors. There are apparently two watchdog timers
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on such processors; this driver supports only the first one,
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because currently Linux only supports exporting one watchdog
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to userspace.
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To compile this driver as a loadable module, choose M here.
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The module will be called sb_wdog.
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config AR7_WDT
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tristate "TI AR7 Watchdog Timer"
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depends on AR7
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@ -92,6 +92,7 @@ obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o
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obj-$(CONFIG_INDYDOG) += indydog.o
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obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
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obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
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obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
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obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
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obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
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@ -0,0 +1,353 @@
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/*
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* Watchdog driver for SiByte SB1 SoCs
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*
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* Copyright (C) 2007 OnStor, Inc. * Andrew Sharp <andy.sharp@onstor.com>
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*
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* This driver is intended to make the second of two hardware watchdogs
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* on the Sibyte 12XX and 11XX SoCs available to the user. There are two
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* such devices available on the SoC, but it seems that there isn't an
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* enumeration class for watchdogs in Linux like there is for RTCs.
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* The second is used rather than the first because it uses IRQ 1,
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* thereby avoiding all that IRQ 0 problematic nonsense.
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*
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* I have not tried this driver on a 1480 processor; it might work
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* just well enough to really screw things up.
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*
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* It is a simple timer, and there is an interrupt that is raised the
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* first time the timer expires. The second time it expires, the chip
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* is reset and there is no way to redirect that NMI. Which could
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* be problematic in some cases where this chip is sitting on the HT
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* bus and has just taken responsibility for providing a cache block.
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* Since the reset can't be redirected to the external reset pin, it is
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* possible that other HT connected processors might hang and not reset.
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* For Linux, a soft reset would probably be even worse than a hard reset.
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* There you have it.
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*
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* The timer takes 23 bits of a 64 bit register (?) as a count value,
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* and decrements the count every microsecond, for a max value of
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* 0x7fffff usec or about 8.3ish seconds.
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*
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* This watchdog borrows some user semantics from the softdog driver,
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* in that if you close the fd, it leaves the watchdog running, unless
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* you previously wrote a 'V' to the fd, in which case it disables
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* the watchdog when you close the fd like some other drivers.
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*
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* Based on various other watchdog drivers, which are probably all
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* loosely based on something Alan Cox wrote years ago.
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*
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* (c) Copyright 1996 Alan Cox <alan@redhat.com>, All Rights Reserved.
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* http://www.redhat.com
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 1 or 2 as published by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/uaccess.h>
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#include <linux/fs.h>
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#include <linux/reboot.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/interrupt.h>
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#include <asm/sibyte/sb1250.h>
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_int.h>
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#include <asm/sibyte/sb1250_scd.h>
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/*
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* set the initial count value of a timer
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*
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* wdog is the iomem address of the cfg register
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*/
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void sbwdog_set(char __iomem *wdog, unsigned long t)
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{
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__raw_writeb(0, wdog - 0x10);
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__raw_writeq(t & 0x7fffffUL, wdog);
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}
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/*
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* cause the timer to [re]load it's initial count and start counting
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* all over again
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*
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* wdog is the iomem address of the cfg register
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*/
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void sbwdog_pet(char __iomem *wdog)
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{
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__raw_writeb(__raw_readb(wdog) | 1, wdog);
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}
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static unsigned long sbwdog_gate; /* keeps it to one thread only */
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static char __iomem *kern_dog = (char __iomem *)(IO_BASE + (A_SCD_WDOG_CFG_0));
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static char __iomem *user_dog = (char __iomem *)(IO_BASE + (A_SCD_WDOG_CFG_1));
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static unsigned long timeout = 0x7fffffUL; /* useconds: 8.3ish secs. */
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static int expect_close;
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static struct watchdog_info ident = {
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.options = WDIOF_CARDRESET | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "SiByte Watchdog",
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};
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/*
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* Allow only a single thread to walk the dog
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*/
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static int sbwdog_open(struct inode *inode, struct file *file)
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{
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nonseekable_open(inode, file);
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if (test_and_set_bit(0, &sbwdog_gate)) {
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return -EBUSY;
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}
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__module_get(THIS_MODULE);
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/*
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* Activate the timer
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*/
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sbwdog_set(user_dog, timeout);
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__raw_writeb(1, user_dog);
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return 0;
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}
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/*
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* Put the dog back in the kennel.
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*/
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static int sbwdog_release(struct inode *inode, struct file *file)
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{
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if (expect_close == 42) {
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__raw_writeb(0, user_dog);
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module_put(THIS_MODULE);
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} else {
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printk(KERN_CRIT "%s: Unexpected close, not stopping watchdog!\n",
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ident.identity);
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sbwdog_pet(user_dog);
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}
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clear_bit(0, &sbwdog_gate);
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expect_close = 0;
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return 0;
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}
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/*
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* 42 - the answer
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*/
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static ssize_t sbwdog_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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int i;
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if (len) {
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/*
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* restart the timer
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*/
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expect_close = 0;
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i)) {
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return -EFAULT;
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}
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if (c == 'V') {
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expect_close = 42;
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}
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}
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sbwdog_pet(user_dog);
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}
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return len;
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}
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static int sbwdog_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int ret = -ENOTTY;
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unsigned long time;
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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ret = copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
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break;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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ret = put_user(0, p);
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break;
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case WDIOC_SETTIMEOUT:
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ret = get_user(time, p);
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if (ret) {
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break;
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}
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time *= 1000000;
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if (time > 0x7fffffUL) {
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ret = -EINVAL;
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break;
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}
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timeout = time;
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sbwdog_set(user_dog, timeout);
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sbwdog_pet(user_dog);
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case WDIOC_GETTIMEOUT:
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/*
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* get the remaining count from the ... count register
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* which is 1*8 before the config register
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*/
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ret = put_user(__raw_readq(user_dog - 8) / 1000000, p);
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break;
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case WDIOC_KEEPALIVE:
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sbwdog_pet(user_dog);
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ret = 0;
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break;
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}
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return ret;
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}
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/*
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* Notifier for system down
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*/
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static int
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sbwdog_notify_sys(struct notifier_block *this, unsigned long code, void *erf)
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{
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if (code == SYS_DOWN || code == SYS_HALT) {
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/*
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* sit and sit
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*/
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__raw_writeb(0, user_dog);
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__raw_writeb(0, kern_dog);
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}
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return NOTIFY_DONE;
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}
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static const struct file_operations sbwdog_fops =
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{
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = sbwdog_write,
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.ioctl = sbwdog_ioctl,
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.open = sbwdog_open,
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.release = sbwdog_release,
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};
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static struct miscdevice sbwdog_miscdev =
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{
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &sbwdog_fops,
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};
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static struct notifier_block sbwdog_notifier = {
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.notifier_call = sbwdog_notify_sys,
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};
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/*
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* interrupt handler
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*
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* doesn't do a whole lot for user, but oh so cleverly written so kernel
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* code can use it to re-up the watchdog, thereby saving the kernel from
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* having to create and maintain a timer, just to tickle another timer,
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* which is just so wrong.
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*/
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irqreturn_t sbwdog_interrupt(int irq, void *addr)
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{
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unsigned long wd_init;
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char *wd_cfg_reg = (char *)addr;
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u8 cfg;
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cfg = __raw_readb(wd_cfg_reg);
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wd_init = __raw_readq(wd_cfg_reg - 8) & 0x7fffff;
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/*
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* if it's the second watchdog timer, it's for those users
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*/
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if (wd_cfg_reg == user_dog) {
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printk(KERN_CRIT
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"%s in danger of initiating system reset in %ld.%01ld seconds\n",
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ident.identity, wd_init / 1000000, (wd_init / 100000) % 10);
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} else {
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cfg |= 1;
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}
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__raw_writeb(cfg, wd_cfg_reg);
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return IRQ_HANDLED;
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}
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static int __init sbwdog_init(void)
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{
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int ret;
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/*
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* register a reboot notifier
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*/
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ret = register_reboot_notifier(&sbwdog_notifier);
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if (ret) {
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printk (KERN_ERR "%s: cannot register reboot notifier (err=%d)\n",
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ident.identity, ret);
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return ret;
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}
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/*
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* get the resources
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*/
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ret = misc_register(&sbwdog_miscdev);
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if (ret == 0) {
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printk(KERN_INFO "%s: timeout is %ld.%ld secs\n", ident.identity,
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timeout / 1000000, (timeout / 100000) % 10);
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}
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ret = request_irq(1, sbwdog_interrupt, IRQF_DISABLED | IRQF_SHARED,
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ident.identity, (void *)user_dog);
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if (ret) {
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printk(KERN_ERR "%s: failed to request irq 1 - %d\n", ident.identity,
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ret);
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misc_deregister(&sbwdog_miscdev);
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}
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return ret;
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}
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static void __exit sbwdog_exit(void)
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{
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misc_deregister(&sbwdog_miscdev);
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}
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module_init(sbwdog_init);
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module_exit(sbwdog_exit);
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MODULE_AUTHOR("Andrew Sharp <andy.sharp@onstor.com>");
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MODULE_DESCRIPTION("SiByte Watchdog");
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module_param(timeout, ulong, 0);
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MODULE_PARM_DESC(timeout,
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"Watchdog timeout in microseconds (max/default 8388607 or 8.3ish secs)");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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/*
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* example code that can be put in a platform code area to utilize the
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* first watchdog timer for the kernels own purpose.
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void
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platform_wd_setup(void)
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{
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int ret;
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ret = request_irq(0, sbwdog_interrupt, IRQF_DISABLED | IRQF_SHARED,
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"Kernel Watchdog", IOADDR(A_SCD_WDOG_CFG_0));
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if (ret) {
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printk(KERN_CRIT "Watchdog IRQ zero(0) failed to be requested - %d\n",
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ret);
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}
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}
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*/
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