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drm/i915: fixup overlay checks for interlaced modes 

The drm core _really_ likes to frob around with the crtc timings and
put halfed vertical timings (in fields) in there. Which confuses the
overlay code, resulting in it's refusal to display anything at the
lower half of an interlaced pipe.

Tested-by: Christopher Egert <cme3000@gmail.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2012-01-28 23:48:46 +01:00
parent c3febcc438
commit 75c13993db
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/i915/intel_overlay.c
View File

@ -937,10 +937,10 @@ static int check_overlay_dst(struct intel_overlay *overlay,
{
struct drm_display_mode *mode = &overlay->crtc->base.mode;
if (rec->dst_x < mode->crtc_hdisplay &&
rec->dst_x + rec->dst_width <= mode->crtc_hdisplay &&
rec->dst_y < mode->crtc_vdisplay &&
rec->dst_y + rec->dst_height <= mode->crtc_vdisplay)
if (rec->dst_x < mode->hdisplay &&
rec->dst_x + rec->dst_width <= mode->hdisplay &&
rec->dst_y < mode->vdisplay &&
rec->dst_y + rec->dst_height <= mode->vdisplay)
return 0;
else
return -EINVAL;