NXP/FSL SoC drivers updates for v4.20 take 2
- Update qbman driver to better work with CPU hotplug - Add Kconfig dependency of 64-bit DMA addressing for qbman driver - Use last reponse to determine valid bit for qbman driver - Defer bman_portals probe if bman is not probed - Add interrupt coalescing APIs to qbman driver -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlu3uhEACgkQhtxQDvus FVTZuhAAg2G6q2ERXWe2CwI+Is8TYAc7HmD06q22+BZrmqtb1VlX56ON7HkTDzMN NXWw3smNs6OIKJp7f5bRpEKex8GIdqrUYOzE7vzavwXBKiQFjkYTlyyUpd1zygns dw8MPj5drvKWLRYonHdeLIlpuIdeau7pxOJze1odT3a5QlJQFnULIT5JA4b4LRjy 9JNhlcr3eecQ9XMabW2cN00Ve0IjhXiIkf2sA4f8ZxHaHlt7lts7/f5fd6gnUxyc vLaNLj1Ul798SpiwwPEi+rog67tnuIijJggv0CM9+AAmwrs4dW5nlzKhe5WlGI53 6o7PDFqfhD+2oeeePU8YMTwJwPv4h+8/gOM46NNs3M10VxbMwpbajXc2OLOi9qHO 6B/+upql0kS6MORN8uMhr6Bg5QD+tTEMZUKmOi9eXxM7TIIsZPaUPkJa5SIlVXKm vqzA7fzmXIOlECEsXJOnXev6VARQjLK3aisZ8SCZMRV5NMIExSye5yqkEsMihblH qH+5CG19I24qPBp3ThnrOCkcVluzt9TWdnQ7x25752HY/UVv/lc0pbv47AZmIhdI MZyhjVXqXssX1EgDKEoc34KHRTj94XyLum6FaUsIc2NrO1wUTT92Q1kVdipIWC4g uHlr1swyUxglGAoJUIh51OZSMsu51PtTCG1pz6+uHmxfPAr+IQA= =2fhR -----END PGP SIGNATURE----- Merge tag 'soc-fsl-next-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers NXP/FSL SoC drivers updates for v4.20 take 2 - Update qbman driver to better work with CPU hotplug - Add Kconfig dependency of 64-bit DMA addressing for qbman driver - Use last reponse to determine valid bit for qbman driver - Defer bman_portals probe if bman is not probed - Add interrupt coalescing APIs to qbman driver * tag 'soc-fsl-next-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qbman: add interrupt coalesce changing APIs soc: fsl: bman_portals: defer probe after bman's probe soc: fsl: qbman: Use last response to determine valid bit soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers soc: fsl: qbman: Check if CPU is offline when initializing portals soc: fsl: qman_portals: defer probe after qman's probe soc: fsl: qbman: add APIs to retrieve the probing status soc: fsl: qe: Fix copy/paste bug in ucc_get_tdm_sync_shift() soc: fsl: qbman: qman: avoid allocating from non existing gen_pool Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
75bda3609f
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|
@ -1251,7 +1251,7 @@ N: meson
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|||
|
||||
ARM/Annapurna Labs ALPINE ARCHITECTURE
|
||||
M: Tsahee Zidenberg <tsahee@annapurnalabs.com>
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M: Antoine Tenart <antoine.tenart@free-electrons.com>
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M: Antoine Tenart <antoine.tenart@bootlin.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/mach-alpine/
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|
|
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@ -11,6 +11,7 @@
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#include "sama5d2-pinfunc.h"
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#include <dt-bindings/mfd/atmel-flexcom.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/at91.h>
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/ {
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model = "Atmel SAMA5D2 PTC EK";
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@ -299,6 +300,7 @@
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<PIN_PA30__NWE_NANDWE>,
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<PIN_PB2__NRD_NANDOE>;
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bias-pull-up;
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atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>;
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};
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ale_cle_rdy_cs {
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@ -106,21 +106,23 @@
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global_timer: timer@1e200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x1e200 0x20>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
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clocks = <&axi_clk>;
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};
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local_timer: local-timer@1e600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0x1e600 0x20>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
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IRQ_TYPE_EDGE_RISING)>;
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clocks = <&axi_clk>;
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};
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twd_watchdog: watchdog@1e620 {
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compatible = "arm,cortex-a9-twd-wdt";
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reg = <0x1e620 0x20>;
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interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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armpll: armpll {
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@ -158,7 +160,7 @@
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serial0: serial@600 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x600 0x1b>;
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interrupts = <GIC_SPI 32 0>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&periph_clk>;
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clock-names = "periph";
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status = "disabled";
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@ -167,7 +169,7 @@
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serial1: serial@620 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x620 0x1b>;
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interrupts = <GIC_SPI 33 0>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&periph_clk>;
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clock-names = "periph";
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status = "disabled";
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@ -180,7 +182,7 @@
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reg = <0x2000 0x600>, <0xf0 0x10>;
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reg-names = "nand", "nand-int-base";
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status = "disabled";
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interrupts = <GIC_SPI 38 0>;
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "nand";
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};
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|
|
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|
@ -800,8 +800,7 @@
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};
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hdmi_phy: hdmi-phy@1ef0000 {
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compatible = "allwinner,sun8i-r40-hdmi-phy",
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"allwinner,sun50i-a64-hdmi-phy";
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compatible = "allwinner,sun8i-r40-hdmi-phy";
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reg = <0x01ef0000 0x10000>;
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clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>,
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<&ccu 7>, <&ccu 16>;
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|
|
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|
|
@ -1,6 +1,6 @@
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menuconfig FSL_DPAA
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bool "QorIQ DPAA1 framework support"
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depends on (FSL_SOC_BOOKE || ARCH_LAYERSCAPE)
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depends on ((FSL_SOC_BOOKE || ARCH_LAYERSCAPE) && ARCH_DMA_ADDR_T_64BIT)
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select GENERIC_ALLOCATOR
|
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help
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The Freescale Data Path Acceleration Architecture (DPAA) is a set of
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|
|
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|
|
@ -562,11 +562,9 @@ static int bman_create_portal(struct bman_portal *portal,
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dev_err(c->dev, "request_irq() failed\n");
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goto fail_irq;
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}
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if (c->cpu != -1 && irq_can_set_affinity(c->irq) &&
|
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irq_set_affinity(c->irq, cpumask_of(c->cpu))) {
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dev_err(c->dev, "irq_set_affinity() failed\n");
|
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|
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if (dpaa_set_portal_irq_affinity(c->dev, c->irq, c->cpu))
|
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goto fail_affinity;
|
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}
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|
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/* Need RCR to be empty before continuing */
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ret = bm_rcr_get_fill(p);
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|
|
|
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|
|
@ -120,6 +120,7 @@ static void bm_set_memory(u64 ba, u32 size)
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*/
|
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static dma_addr_t fbpr_a;
|
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static size_t fbpr_sz;
|
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static int __bman_probed;
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|
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static int bman_fbpr(struct reserved_mem *rmem)
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{
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|
@ -166,6 +167,12 @@ static irqreturn_t bman_isr(int irq, void *ptr)
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return IRQ_HANDLED;
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}
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int bman_is_probed(void)
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{
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return __bman_probed;
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}
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EXPORT_SYMBOL_GPL(bman_is_probed);
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static int fsl_bman_probe(struct platform_device *pdev)
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{
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int ret, err_irq;
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@ -175,6 +182,8 @@ static int fsl_bman_probe(struct platform_device *pdev)
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u16 id, bm_pool_cnt;
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u8 major, minor;
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__bman_probed = -1;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "Can't get %pOF property 'IORESOURCE_MEM'\n",
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@ -255,6 +264,8 @@ static int fsl_bman_probe(struct platform_device *pdev)
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return ret;
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}
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__bman_probed = 1;
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return 0;
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};
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|
|
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@ -65,7 +65,9 @@ static int bman_offline_cpu(unsigned int cpu)
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if (!pcfg)
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return 0;
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irq_set_affinity(pcfg->irq, cpumask_of(0));
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/* use any other online CPU */
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cpu = cpumask_any_but(cpu_online_mask, cpu);
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irq_set_affinity(pcfg->irq, cpumask_of(cpu));
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return 0;
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}
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@ -91,7 +93,15 @@ static int bman_portal_probe(struct platform_device *pdev)
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struct device_node *node = dev->of_node;
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struct bm_portal_config *pcfg;
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struct resource *addr_phys[2];
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int irq, cpu;
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int irq, cpu, err;
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err = bman_is_probed();
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if (!err)
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return -EPROBE_DEFER;
|
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if (err < 0) {
|
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dev_err(&pdev->dev, "failing probe due to bman probe error\n");
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return -ENODEV;
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}
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pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL);
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if (!pcfg)
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|
|
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|
|
@ -111,4 +111,24 @@ int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,
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#define QBMAN_MEMREMAP_ATTR MEMREMAP_WC
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#endif
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|
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static inline int dpaa_set_portal_irq_affinity(struct device *dev,
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int irq, int cpu)
|
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{
|
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int ret = 0;
|
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|
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if (!irq_can_set_affinity(irq)) {
|
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dev_err(dev, "unable to set IRQ affinity\n");
|
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return -EINVAL;
|
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}
|
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|
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if (cpu == -1 || !cpu_online(cpu))
|
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cpu = cpumask_any(cpu_online_mask);
|
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|
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ret = irq_set_affinity(irq, cpumask_of(cpu));
|
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if (ret)
|
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dev_err(dev, "irq_set_affinity() on CPU %d failed\n", cpu);
|
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|
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return ret;
|
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}
|
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|
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#endif /* __DPAA_SYS_H */
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|
|
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|||
|
|
@ -850,12 +850,24 @@ static inline void qm_mr_set_ithresh(struct qm_portal *portal, u8 ithresh)
|
|||
|
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static inline int qm_mc_init(struct qm_portal *portal)
|
||||
{
|
||||
u8 rr0, rr1;
|
||||
struct qm_mc *mc = &portal->mc;
|
||||
|
||||
mc->cr = portal->addr.ce + QM_CL_CR;
|
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mc->rr = portal->addr.ce + QM_CL_RR0;
|
||||
mc->rridx = (mc->cr->_ncw_verb & QM_MCC_VERB_VBIT)
|
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? 0 : 1;
|
||||
/*
|
||||
* The expected valid bit polarity for the next CR command is 0
|
||||
* if RR1 contains a valid response, and is 1 if RR0 contains a
|
||||
* valid response. If both RR contain all 0, this indicates either
|
||||
* that no command has been executed since reset (in which case the
|
||||
* expected valid bit polarity is 1)
|
||||
*/
|
||||
rr0 = mc->rr->verb;
|
||||
rr1 = (mc->rr+1)->verb;
|
||||
if ((rr0 == 0 && rr1 == 0) || rr0 != 0)
|
||||
mc->rridx = 1;
|
||||
else
|
||||
mc->rridx = 0;
|
||||
mc->vbit = mc->rridx ? QM_MCC_VERB_VBIT : 0;
|
||||
#ifdef CONFIG_FSL_DPAA_CHECKING
|
||||
mc->state = qman_mc_idle;
|
||||
|
|
@ -1000,6 +1012,37 @@ static inline void put_affine_portal(void)
|
|||
|
||||
static struct workqueue_struct *qm_portal_wq;
|
||||
|
||||
void qman_dqrr_set_ithresh(struct qman_portal *portal, u8 ithresh)
|
||||
{
|
||||
if (!portal)
|
||||
return;
|
||||
|
||||
qm_dqrr_set_ithresh(&portal->p, ithresh);
|
||||
portal->p.dqrr.ithresh = ithresh;
|
||||
}
|
||||
EXPORT_SYMBOL(qman_dqrr_set_ithresh);
|
||||
|
||||
void qman_dqrr_get_ithresh(struct qman_portal *portal, u8 *ithresh)
|
||||
{
|
||||
if (portal && ithresh)
|
||||
*ithresh = portal->p.dqrr.ithresh;
|
||||
}
|
||||
EXPORT_SYMBOL(qman_dqrr_get_ithresh);
|
||||
|
||||
void qman_portal_get_iperiod(struct qman_portal *portal, u32 *iperiod)
|
||||
{
|
||||
if (portal && iperiod)
|
||||
*iperiod = qm_in(&portal->p, QM_REG_ITPR);
|
||||
}
|
||||
EXPORT_SYMBOL(qman_portal_get_iperiod);
|
||||
|
||||
void qman_portal_set_iperiod(struct qman_portal *portal, u32 iperiod)
|
||||
{
|
||||
if (portal)
|
||||
qm_out(&portal->p, QM_REG_ITPR, iperiod);
|
||||
}
|
||||
EXPORT_SYMBOL(qman_portal_set_iperiod);
|
||||
|
||||
int qman_wq_alloc(void)
|
||||
{
|
||||
qm_portal_wq = alloc_workqueue("qman_portal_wq", 0, 1);
|
||||
|
|
@ -1210,11 +1253,9 @@ static int qman_create_portal(struct qman_portal *portal,
|
|||
dev_err(c->dev, "request_irq() failed\n");
|
||||
goto fail_irq;
|
||||
}
|
||||
if (c->cpu != -1 && irq_can_set_affinity(c->irq) &&
|
||||
irq_set_affinity(c->irq, cpumask_of(c->cpu))) {
|
||||
dev_err(c->dev, "irq_set_affinity() failed\n");
|
||||
|
||||
if (dpaa_set_portal_irq_affinity(c->dev, c->irq, c->cpu))
|
||||
goto fail_affinity;
|
||||
}
|
||||
|
||||
/* Need EQCR to be empty before continuing */
|
||||
isdr &= ~QM_PIRQ_EQCI;
|
||||
|
|
@ -2729,6 +2770,9 @@ static int qman_alloc_range(struct gen_pool *p, u32 *result, u32 cnt)
|
|||
{
|
||||
unsigned long addr;
|
||||
|
||||
if (!p)
|
||||
return -ENODEV;
|
||||
|
||||
addr = gen_pool_alloc(p, cnt);
|
||||
if (!addr)
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
|
|
@ -273,6 +273,7 @@ static const struct qman_error_info_mdata error_mdata[] = {
|
|||
static u32 __iomem *qm_ccsr_start;
|
||||
/* A SDQCR mask comprising all the available/visible pool channels */
|
||||
static u32 qm_pools_sdqcr;
|
||||
static int __qman_probed;
|
||||
|
||||
static inline u32 qm_ccsr_in(u32 offset)
|
||||
{
|
||||
|
|
@ -686,6 +687,12 @@ static int qman_resource_init(struct device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int qman_is_probed(void)
|
||||
{
|
||||
return __qman_probed;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(qman_is_probed);
|
||||
|
||||
static int fsl_qman_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
|
|
@ -695,6 +702,8 @@ static int fsl_qman_probe(struct platform_device *pdev)
|
|||
u16 id;
|
||||
u8 major, minor;
|
||||
|
||||
__qman_probed = -1;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_err(dev, "Can't get %pOF property 'IORESOURCE_MEM'\n",
|
||||
|
|
@ -828,6 +837,8 @@ static int fsl_qman_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
__qman_probed = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -195,8 +195,10 @@ static int qman_offline_cpu(unsigned int cpu)
|
|||
if (p) {
|
||||
pcfg = qman_get_qm_portal_config(p);
|
||||
if (pcfg) {
|
||||
irq_set_affinity(pcfg->irq, cpumask_of(0));
|
||||
qman_portal_update_sdest(pcfg, 0);
|
||||
/* select any other online CPU */
|
||||
cpu = cpumask_any_but(cpu_online_mask, cpu);
|
||||
irq_set_affinity(pcfg->irq, cpumask_of(cpu));
|
||||
qman_portal_update_sdest(pcfg, cpu);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -227,6 +229,14 @@ static int qman_portal_probe(struct platform_device *pdev)
|
|||
int irq, cpu, err;
|
||||
u32 val;
|
||||
|
||||
err = qman_is_probed();
|
||||
if (!err)
|
||||
return -EPROBE_DEFER;
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "failing probe due to qman probe error\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL);
|
||||
if (!pcfg)
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
|
|
@ -626,7 +626,7 @@ static u32 ucc_get_tdm_sync_shift(enum comm_dir mode, u32 tdm_num)
|
|||
{
|
||||
u32 shift;
|
||||
|
||||
shift = (mode == COMM_DIR_RX) ? RX_SYNC_SHIFT_BASE : RX_SYNC_SHIFT_BASE;
|
||||
shift = (mode == COMM_DIR_RX) ? RX_SYNC_SHIFT_BASE : TX_SYNC_SHIFT_BASE;
|
||||
shift -= tdm_num * 2;
|
||||
|
||||
return shift;
|
||||
|
|
|
|||
|
|
@ -126,4 +126,12 @@ int bman_release(struct bman_pool *pool, const struct bm_buffer *bufs, u8 num);
|
|||
*/
|
||||
int bman_acquire(struct bman_pool *pool, struct bm_buffer *bufs, u8 num);
|
||||
|
||||
/**
|
||||
* bman_is_probed - Check if bman is probed
|
||||
*
|
||||
* Returns 1 if the bman driver successfully probed, -1 if the bman driver
|
||||
* failed to probe or 0 if the bman driver did not probed yet.
|
||||
*/
|
||||
int bman_is_probed(void);
|
||||
|
||||
#endif /* __FSL_BMAN_H */
|
||||
|
|
|
|||
|
|
@ -1186,4 +1186,40 @@ int qman_alloc_cgrid_range(u32 *result, u32 count);
|
|||
*/
|
||||
int qman_release_cgrid(u32 id);
|
||||
|
||||
/**
|
||||
* qman_is_probed - Check if qman is probed
|
||||
*
|
||||
* Returns 1 if the qman driver successfully probed, -1 if the qman driver
|
||||
* failed to probe or 0 if the qman driver did not probed yet.
|
||||
*/
|
||||
int qman_is_probed(void);
|
||||
|
||||
/**
|
||||
* qman_dqrr_get_ithresh - Get coalesce interrupt threshold
|
||||
* @portal: portal to get the value for
|
||||
* @ithresh: threshold pointer
|
||||
*/
|
||||
void qman_dqrr_get_ithresh(struct qman_portal *portal, u8 *ithresh);
|
||||
|
||||
/**
|
||||
* qman_dqrr_set_ithresh - Set coalesce interrupt threshold
|
||||
* @portal: portal to set the new value on
|
||||
* @ithresh: new threshold value
|
||||
*/
|
||||
void qman_dqrr_set_ithresh(struct qman_portal *portal, u8 ithresh);
|
||||
|
||||
/**
|
||||
* qman_dqrr_get_iperiod - Get coalesce interrupt period
|
||||
* @portal: portal to get the value for
|
||||
* @iperiod: period pointer
|
||||
*/
|
||||
void qman_portal_get_iperiod(struct qman_portal *portal, u32 *iperiod);
|
||||
|
||||
/**
|
||||
* qman_dqrr_set_iperiod - Set coalesce interrupt period
|
||||
* @portal: portal to set the new value on
|
||||
* @ithresh: new period value
|
||||
*/
|
||||
void qman_portal_set_iperiod(struct qman_portal *portal, u32 iperiod);
|
||||
|
||||
#endif /* __FSL_QMAN_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue