MIPS: jz4740: Correct clock gate bit for DMA controller
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
parent
25ce6c35fe
commit
757f4e51b7
|
@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = {
|
||||||
[3] = {
|
[3] = {
|
||||||
.name = "dma",
|
.name = "dma",
|
||||||
.parent = &jz_clk_high_speed_peripheral.clk,
|
.parent = &jz_clk_high_speed_peripheral.clk,
|
||||||
.gate_bit = JZ_CLOCK_GATE_UART0,
|
.gate_bit = JZ_CLOCK_GATE_DMAC,
|
||||||
.ops = &jz_clk_simple_ops,
|
.ops = &jz_clk_simple_ops,
|
||||||
},
|
},
|
||||||
[4] = {
|
[4] = {
|
||||||
|
|
Loading…
Reference in New Issue