Metag architecture changes for v4.8
Just a few minor fixes: - Fix another incorrect inline asm register constraint, which has been lying quietly for 5 and a half years before finally causing build breakage during this merge window. - Removal of duplicated KERN_INFO from Joe Perches. - Typo fixes from Andrea Gelmini. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJXo7kUAAoJEGwLaZPeOHZ6cBIP/3riUgQkk9kDFyxR2AvkCexq kbE6iXhYIUf3x/TO+ohPXeVNvqnGShGITzrYE8WPJoYCvqBfzFns6hryXPI63gEj WZh3SDik4dY47t7N20gE8wJXhdiSuhB1bMpd4MshxLGi7X18rYwKnraOuLv32v+8 GzPAU0o4qgiKE7bdhrG2uQkXax/4phbTvUF0+tDoplsI9neIY7BGxipoOZZkwNvQ cZ9K5fdLlh707cOJKb8NjBEDxn/FNKnweXZayEtRCiArjQZLA8RO2Wxt3nDvrRWH hCQMNXS6CoDqBmKk9QdtwBfrSkCpHZ2Eqp7/tInJl9O5cdZCJRdS9Ampjv0OglIB f9JCT7UcMz1T6X9N6C94XIiH/xrSirxzChIPE+iHfMczFXaaqg8jrjagWd+1MAY2 AMYtyM3ySrcolDLaiXbd2pnxdZI/E1Pv/sOT00p2fmb44sHdXcs0nWQqW+w8bQH0 vwkB/xJgGSY9hV7ChpmkEHgbtj5OVdVZeCS/vxZs0n2yobS5tU9RC4iPBR7Z1RYE rlXR4AWmjIhi8Im0/JF5gKotB1kidP0acT3LXFHZDnDLNFl1OxpY8LkZ7cxLJQFj dP3SKzqNXfZrxWSE466jJzk+hyICHZBtLfQPvgNMcppkso/QmPelGqc64+nDtor6 DrUBb9DMcOfHRRXhgdeu =8ih8 -----END PGP SIGNATURE----- Merge tag 'metag-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag Pull metag architecture updates from James Hogan: "Just a few minor fixes: - Fix another incorrect inline asm register constraint, which has been lying quietly for 5 and a half years before finally causing build breakage during this merge window. - Removal of duplicated KERN_INFO from Joe Perches - Typo fixes from Andrea Gelmini" * tag 'metag-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag: metag: Fix __cmpxchg_u32 asm constraint for CMP metag: Remove duplicate KERN_<LEVEL> prefix metag: Fix typos
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755b20f492
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@ -73,7 +73,7 @@ static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
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" DCACHE [%2], %0\n"
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#endif
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"2:\n"
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: "=&d" (temp), "=&da" (retval)
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: "=&d" (temp), "=&d" (retval)
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: "da" (m), "bd" (old), "da" (new)
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: "cc"
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);
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@ -881,7 +881,7 @@
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#define PERFCTRL_DCSTALL 11 /* Dcache+TLB o/p delayed (per-thread) */
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#define PERFCTRL_ICSTALL 12 /* Icache+TLB o/p delayed (per-thread) */
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#define PERFCTRL_INT 13 /* Internal core delailed events (see next) */
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#define PERFCTRL_INT 13 /* Internal core detailed events (see next) */
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#define PERFCTRL_EXT 15 /* External source in core periphery */
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#endif /* METAC_2_1 */
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@ -179,7 +179,7 @@
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; is best to dump these registers immediately at the start of a routine
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; using a MSETL or SETL instruction-
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;
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; MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2; Only dump argments expected
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; MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2; Only dump arguments expected
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;or SETL [A0StP+#8++],D0Ar2 ; Up to two 32-bit args expected
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;
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; For non-leaf routines it is always necessary to save and restore at least
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@ -15,7 +15,7 @@
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#define SYSC_DCPART(n) (SYSC_DCPART0 + SYSC_xCPARTn_STRIDE * (n))
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#define SYSC_ICPART(n) (SYSC_ICPART0 + SYSC_xCPARTn_STRIDE * (n))
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#define CACHE_ASSOCIATIVITY 4 /* 4 way set-assosiative */
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#define CACHE_ASSOCIATIVITY 4 /* 4 way set-associative */
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#define ICACHE 0
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#define DCACHE 1
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@ -50,7 +50,7 @@ $LIDMCQuick:
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ADDCC D0Re0,D0Re0,#1 ! If yes result += 1
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SUBCC D1Ar1,D1Ar1,D1Re0 ! and A -= Bu
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ORS D0Ar4,D0Ar4,D0Ar4 ! Return neg result?
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NEG D0Ar2,D0Re0 ! Calulate neg result
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NEG D0Ar2,D0Re0 ! Calculate neg result
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MOVMI D0Re0,D0Ar2 ! Yes: Take neg result
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$LIDMCRet:
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MOV PC,D1RtP
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@ -94,7 +94,7 @@ $LIDMCLoop:
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LSR D1Re0, D1Re0, #1 ! Shift down B
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BNZ $LIDMCLoop ! Was single bit in curbit lost?
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ORS D0Ar4,D0Ar4,D0Ar4 ! Return neg result?
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NEG D0Ar2,D0Re0 ! Calulate neg result
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NEG D0Ar2,D0Re0 ! Calculate neg result
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MOVMI D0Re0,D0Ar2 ! Yes: Take neg result
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MOV PC,D1RtP
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.size ___divsi3,.-___divsi3
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@ -187,7 +187,7 @@ bad_area_nosemaphore:
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if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
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printk_ratelimit()) {
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pr_info("%s%s[%d]: segfault at %lx pc %08x sp %08x write %d trap %#x (%s)",
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printk("%s%s[%d]: segfault at %lx pc %08x sp %08x write %d trap %#x (%s)",
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task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
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tsk->comm, task_pid_nr(tsk), address,
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regs->ctx.CurrPC, regs->ctx.AX[0].U0,
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