MIPS: PM: Implement PM helper macros
Implement assembler helper macros in asm/pm.h for platform code to use for saving context across low power states - for example suspend to RAM or powered down cpuidle states. Macros are provided for saving and restoring the main CPU context used by C code and doing important configuration which must be done very early during resume. Notably EVA needs segmentation control registers to be restored before the stack or dynamically allocated memory is accessed, so that state is saved in global data. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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James Hogan
Paul Burton
parent
eaa38d6343
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74e9133519
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/*
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* Copyright (C) 2014 Imagination Technologies Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* PM helper macros for CPU power off (e.g. Suspend-to-RAM).
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*/
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#ifndef __ASM_PM_H
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#define __ASM_PM_H
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#ifdef __ASSEMBLY__
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#include <asm/asm-offsets.h>
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/regdef.h>
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/* Save CPU state to stack for suspend to RAM */
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.macro SUSPEND_SAVE_REGS
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subu sp, PT_SIZE
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/* Call preserved GPRs */
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LONG_S $16, PT_R16(sp)
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LONG_S $17, PT_R17(sp)
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LONG_S $18, PT_R18(sp)
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LONG_S $19, PT_R19(sp)
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LONG_S $20, PT_R20(sp)
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LONG_S $21, PT_R21(sp)
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LONG_S $22, PT_R22(sp)
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LONG_S $23, PT_R23(sp)
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LONG_S $28, PT_R28(sp)
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LONG_S $30, PT_R30(sp)
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LONG_S $31, PT_R31(sp)
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/* A couple of CP0 registers with space in pt_regs */
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mfc0 k0, CP0_STATUS
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LONG_S k0, PT_STATUS(sp)
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#ifdef CONFIG_MIPS_MT_SMTC
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mfc0 k0, CP0_TCSTATUS
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LONG_S k0, PT_TCSTATUS(sp)
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#endif
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.endm
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/* Restore CPU state from stack after resume from RAM */
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.macro RESUME_RESTORE_REGS_RETURN
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.set push
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.set noreorder
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/* A couple of CP0 registers with space in pt_regs */
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LONG_L k0, PT_STATUS(sp)
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mtc0 k0, CP0_STATUS
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#ifdef CONFIG_MIPS_MT_SMTC
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LONG_L k0, PT_TCSTATUS(sp)
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mtc0 k0, CP0_TCSTATUS
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#endif
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/* Call preserved GPRs */
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LONG_L $16, PT_R16(sp)
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LONG_L $17, PT_R17(sp)
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LONG_L $18, PT_R18(sp)
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LONG_L $19, PT_R19(sp)
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LONG_L $20, PT_R20(sp)
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LONG_L $21, PT_R21(sp)
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LONG_L $22, PT_R22(sp)
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LONG_L $23, PT_R23(sp)
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LONG_L $28, PT_R28(sp)
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LONG_L $30, PT_R30(sp)
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LONG_L $31, PT_R31(sp)
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/* Pop and return */
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jr ra
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addiu sp, PT_SIZE
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.set pop
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.endm
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/* Get address of static suspend state into t1 */
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.macro LA_STATIC_SUSPEND
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la t1, mips_static_suspend_state
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.endm
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/* Save important CPU state for early restoration to global data */
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.macro SUSPEND_SAVE_STATIC
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#ifdef CONFIG_EVA
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/*
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* Segment configuration is saved in global data where it can be easily
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* reloaded without depending on the segment configuration.
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*/
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mfc0 k0, CP0_PAGEMASK, 2 /* SegCtl0 */
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LONG_S k0, SSS_SEGCTL0(t1)
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mfc0 k0, CP0_PAGEMASK, 3 /* SegCtl1 */
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LONG_S k0, SSS_SEGCTL1(t1)
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mfc0 k0, CP0_PAGEMASK, 4 /* SegCtl2 */
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LONG_S k0, SSS_SEGCTL2(t1)
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#endif
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/* save stack pointer (pointing to GPRs) */
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LONG_S sp, SSS_SP(t1)
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.endm
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/* Restore important CPU state early from global data */
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.macro RESUME_RESTORE_STATIC
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#ifdef CONFIG_EVA
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/*
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* Segment configuration must be restored prior to any access to
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* allocated memory, as it may reside outside of the legacy kernel
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* segments.
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*/
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LONG_L k0, SSS_SEGCTL0(t1)
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mtc0 k0, CP0_PAGEMASK, 2 /* SegCtl0 */
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LONG_L k0, SSS_SEGCTL1(t1)
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mtc0 k0, CP0_PAGEMASK, 3 /* SegCtl1 */
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LONG_L k0, SSS_SEGCTL2(t1)
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mtc0 k0, CP0_PAGEMASK, 4 /* SegCtl2 */
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tlbw_use_hazard
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#endif
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/* restore stack pointer (pointing to GPRs) */
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LONG_L sp, SSS_SP(t1)
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.endm
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/* flush caches to make sure context has reached memory */
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.macro SUSPEND_CACHE_FLUSH
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.extern __wback_cache_all
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.set push
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.set noreorder
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la t1, __wback_cache_all
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LONG_L t0, 0(t1)
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jalr t0
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nop
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.set pop
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.endm
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/* Save suspend state and flush data caches to RAM */
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.macro SUSPEND_SAVE
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SUSPEND_SAVE_REGS
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LA_STATIC_SUSPEND
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SUSPEND_SAVE_STATIC
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SUSPEND_CACHE_FLUSH
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.endm
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/* Restore saved state after resume from RAM and return */
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.macro RESUME_RESTORE_RETURN
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LA_STATIC_SUSPEND
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RESUME_RESTORE_STATIC
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RESUME_RESTORE_REGS_RETURN
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.endm
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#else /* __ASSEMBLY__ */
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/**
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* struct mips_static_suspend_state - Core saved CPU state across S2R.
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* @segctl: CP0 Segment control registers.
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* @sp: Stack frame where GP register context is saved.
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*
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* This structure contains minimal CPU state that must be saved in static kernel
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* data in order to be able to restore the rest of the state. This includes
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* segmentation configuration in the case of EVA being enabled, as they must be
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* restored prior to any kmalloc'd memory being referenced (even the stack
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* pointer).
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*/
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struct mips_static_suspend_state {
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#ifdef CONFIG_EVA
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unsigned long segctl[3];
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#endif
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unsigned long sp;
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};
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#endif /* !__ASSEMBLY__ */
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#endif /* __ASM_PM_HELPERS_H */
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@ -14,6 +14,7 @@
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#include <linux/mm.h>
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#include <linux/kbuild.h>
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#include <linux/suspend.h>
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#include <asm/pm.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/smp-cps.h>
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@ -404,6 +405,20 @@ void output_pbe_defines(void)
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}
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#endif
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#ifdef CONFIG_CPU_PM
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void output_pm_defines(void)
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{
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COMMENT(" PM offsets. ");
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#ifdef CONFIG_EVA
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OFFSET(SSS_SEGCTL0, mips_static_suspend_state, segctl[0]);
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OFFSET(SSS_SEGCTL1, mips_static_suspend_state, segctl[1]);
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OFFSET(SSS_SEGCTL2, mips_static_suspend_state, segctl[2]);
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#endif
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OFFSET(SSS_SP, mips_static_suspend_state, sp);
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BLANK();
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}
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#endif
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void output_kvm_defines(void)
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{
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COMMENT(" KVM/MIPS Specfic offsets. ");
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@ -15,8 +15,12 @@
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#include <asm/dsp.h>
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#include <asm/fpu.h>
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#include <asm/mmu_context.h>
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#include <asm/pm.h>
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#include <asm/watch.h>
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/* Used by PM helper macros in asm/pm.h */
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struct mips_static_suspend_state mips_static_suspend_state;
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/**
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* mips_cpu_save() - Save general CPU state.
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* Ensures that general CPU context is saved, notably FPU and DSP.
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