crypto: hisilicon/sec2 - Add pbuffer mode for SEC driver
In the scenario of SMMU translation, the SEC performance of short messages (<512Bytes) cannot meet our expectations. To avoid this, we reserve the plat buffer (PBUF) memory for small packets when creating TFM. Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Longfang Liu
Herbert Xu
parent
2514f5595d
commit
74b58db8b7
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@ -11,6 +11,8 @@
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/* Algorithm resource per hardware SEC queue */
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struct sec_alg_res {
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u8 *pbuf;
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dma_addr_t pbuf_dma;
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u8 *c_ivin;
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dma_addr_t c_ivin_dma;
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u8 *out_mac;
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@ -50,6 +52,7 @@ struct sec_req {
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/* Status of the SEC request */
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bool fake_busy;
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bool use_pbuf;
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};
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/**
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@ -130,6 +133,7 @@ struct sec_ctx {
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atomic_t dec_qcyclic;
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enum sec_alg_type alg_type;
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bool pbuf_supported;
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struct sec_cipher_ctx c_ctx;
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struct sec_auth_ctx a_ctx;
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};
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@ -48,6 +48,19 @@
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#define SEC_MAX_MAC_LEN 64
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#define SEC_MAX_AAD_LEN 65535
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#define SEC_TOTAL_MAC_SZ (SEC_MAX_MAC_LEN * QM_Q_DEPTH)
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#define SEC_PBUF_SZ 512
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#define SEC_PBUF_IV_OFFSET SEC_PBUF_SZ
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#define SEC_PBUF_MAC_OFFSET (SEC_PBUF_SZ + SEC_IV_SIZE)
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#define SEC_PBUF_PKG (SEC_PBUF_SZ + SEC_IV_SIZE + \
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SEC_MAX_MAC_LEN * 2)
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#define SEC_PBUF_NUM (PAGE_SIZE / SEC_PBUF_PKG)
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#define SEC_PBUF_PAGE_NUM (QM_Q_DEPTH / SEC_PBUF_NUM)
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#define SEC_PBUF_LEFT_SZ (SEC_PBUF_PKG * (QM_Q_DEPTH - \
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SEC_PBUF_PAGE_NUM * SEC_PBUF_NUM))
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#define SEC_TOTAL_PBUF_SZ (PAGE_SIZE * SEC_PBUF_PAGE_NUM + \
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SEC_PBUF_LEFT_SZ)
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#define SEC_SQE_LEN_RATE 4
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#define SEC_SQE_CFLAG 2
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#define SEC_SQE_AEAD_FLAG 3
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@ -246,6 +259,50 @@ static void sec_free_mac_resource(struct device *dev, struct sec_alg_res *res)
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res->out_mac, res->out_mac_dma);
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}
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static void sec_free_pbuf_resource(struct device *dev, struct sec_alg_res *res)
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{
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if (res->pbuf)
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dma_free_coherent(dev, SEC_TOTAL_PBUF_SZ,
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res->pbuf, res->pbuf_dma);
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}
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/*
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* To improve performance, pbuffer is used for
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* small packets (< 512Bytes) as IOMMU translation using.
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*/
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static int sec_alloc_pbuf_resource(struct device *dev, struct sec_alg_res *res)
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{
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int pbuf_page_offset;
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int i, j, k;
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res->pbuf = dma_alloc_coherent(dev, SEC_TOTAL_PBUF_SZ,
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&res->pbuf_dma, GFP_KERNEL);
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if (!res->pbuf)
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return -ENOMEM;
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/*
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* SEC_PBUF_PKG contains data pbuf, iv and
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* out_mac : <SEC_PBUF|SEC_IV|SEC_MAC>
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* Every PAGE contains six SEC_PBUF_PKG
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* The sec_qp_ctx contains QM_Q_DEPTH numbers of SEC_PBUF_PKG
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* So we need SEC_PBUF_PAGE_NUM numbers of PAGE
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* for the SEC_TOTAL_PBUF_SZ
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*/
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for (i = 0; i <= SEC_PBUF_PAGE_NUM; i++) {
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pbuf_page_offset = PAGE_SIZE * i;
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for (j = 0; j < SEC_PBUF_NUM; j++) {
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k = i * SEC_PBUF_NUM + j;
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if (k == QM_Q_DEPTH)
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break;
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res[k].pbuf = res->pbuf +
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j * SEC_PBUF_PKG + pbuf_page_offset;
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res[k].pbuf_dma = res->pbuf_dma +
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j * SEC_PBUF_PKG + pbuf_page_offset;
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}
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}
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return 0;
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}
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static int sec_alg_resource_alloc(struct sec_ctx *ctx,
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struct sec_qp_ctx *qp_ctx)
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{
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@ -262,6 +319,13 @@ static int sec_alg_resource_alloc(struct sec_ctx *ctx,
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if (ret)
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goto alloc_fail;
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}
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if (ctx->pbuf_supported) {
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ret = sec_alloc_pbuf_resource(dev, res);
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if (ret) {
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dev_err(dev, "fail to alloc pbuf dma resource!\n");
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goto alloc_fail;
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}
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}
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return 0;
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alloc_fail:
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@ -277,6 +341,8 @@ static void sec_alg_resource_free(struct sec_ctx *ctx,
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sec_free_civ_resource(dev, qp_ctx->res);
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if (ctx->pbuf_supported)
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sec_free_pbuf_resource(dev, qp_ctx->res);
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if (ctx->alg_type == SEC_AEAD)
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sec_free_mac_resource(dev, qp_ctx->res);
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}
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@ -369,6 +435,8 @@ static int sec_ctx_base_init(struct sec_ctx *ctx)
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ctx->sec = sec;
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ctx->hlf_q_num = sec->ctx_q_num >> 1;
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ctx->pbuf_supported = ctx->sec->iommu_used;
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/* Half of queue depth is taken as fake requests limit in the queue. */
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ctx->fake_req_limit = QM_Q_DEPTH >> 1;
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ctx->qp_ctx = kcalloc(sec->ctx_q_num, sizeof(struct sec_qp_ctx),
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@ -591,6 +659,66 @@ GEN_SEC_SETKEY_FUNC(3des_cbc, SEC_CALG_3DES, SEC_CMODE_CBC)
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GEN_SEC_SETKEY_FUNC(sm4_xts, SEC_CALG_SM4, SEC_CMODE_XTS)
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GEN_SEC_SETKEY_FUNC(sm4_cbc, SEC_CALG_SM4, SEC_CMODE_CBC)
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static int sec_cipher_pbuf_map(struct sec_ctx *ctx, struct sec_req *req,
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struct scatterlist *src)
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{
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struct aead_request *aead_req = req->aead_req.aead_req;
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struct sec_cipher_req *c_req = &req->c_req;
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struct sec_qp_ctx *qp_ctx = req->qp_ctx;
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struct device *dev = SEC_CTX_DEV(ctx);
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int copy_size, pbuf_length;
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int req_id = req->req_id;
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if (ctx->alg_type == SEC_AEAD)
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copy_size = aead_req->cryptlen + aead_req->assoclen;
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else
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copy_size = c_req->c_len;
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pbuf_length = sg_copy_to_buffer(src, sg_nents(src),
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qp_ctx->res[req_id].pbuf,
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copy_size);
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if (unlikely(pbuf_length != copy_size)) {
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dev_err(dev, "copy src data to pbuf error!\n");
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return -EINVAL;
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}
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c_req->c_in_dma = qp_ctx->res[req_id].pbuf_dma;
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if (!c_req->c_in_dma) {
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dev_err(dev, "fail to set pbuffer address!\n");
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return -ENOMEM;
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}
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c_req->c_out_dma = c_req->c_in_dma;
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return 0;
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}
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static void sec_cipher_pbuf_unmap(struct sec_ctx *ctx, struct sec_req *req,
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struct scatterlist *dst)
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{
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struct aead_request *aead_req = req->aead_req.aead_req;
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struct sec_cipher_req *c_req = &req->c_req;
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struct sec_qp_ctx *qp_ctx = req->qp_ctx;
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struct device *dev = SEC_CTX_DEV(ctx);
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int copy_size, pbuf_length;
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int req_id = req->req_id;
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if (ctx->alg_type == SEC_AEAD)
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copy_size = c_req->c_len + aead_req->assoclen;
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else
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copy_size = c_req->c_len;
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pbuf_length = sg_copy_from_buffer(dst, sg_nents(dst),
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qp_ctx->res[req_id].pbuf,
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copy_size);
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if (unlikely(pbuf_length != copy_size))
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dev_err(dev, "copy pbuf data to dst error!\n");
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}
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static int sec_cipher_map(struct sec_ctx *ctx, struct sec_req *req,
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struct scatterlist *src, struct scatterlist *dst)
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{
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@ -599,7 +727,20 @@ static int sec_cipher_map(struct sec_ctx *ctx, struct sec_req *req,
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struct sec_qp_ctx *qp_ctx = req->qp_ctx;
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struct sec_alg_res *res = &qp_ctx->res[req->req_id];
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struct device *dev = SEC_CTX_DEV(ctx);
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int ret;
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if (req->use_pbuf) {
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ret = sec_cipher_pbuf_map(ctx, req, src);
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c_req->c_ivin = res->pbuf + SEC_PBUF_IV_OFFSET;
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c_req->c_ivin_dma = res->pbuf_dma + SEC_PBUF_IV_OFFSET;
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if (ctx->alg_type == SEC_AEAD) {
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a_req->out_mac = res->pbuf + SEC_PBUF_MAC_OFFSET;
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a_req->out_mac_dma = res->pbuf_dma +
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SEC_PBUF_MAC_OFFSET;
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}
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return ret;
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}
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c_req->c_ivin = res->c_ivin;
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c_req->c_ivin_dma = res->c_ivin_dma;
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if (ctx->alg_type == SEC_AEAD) {
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@ -642,10 +783,14 @@ static void sec_cipher_unmap(struct sec_ctx *ctx, struct sec_req *req,
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struct sec_cipher_req *c_req = &req->c_req;
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struct device *dev = SEC_CTX_DEV(ctx);
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if (req->use_pbuf) {
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sec_cipher_pbuf_unmap(ctx, req, dst);
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} else {
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if (dst != src)
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hisi_acc_sg_buf_unmap(dev, src, c_req->c_in);
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hisi_acc_sg_buf_unmap(dev, dst, c_req->c_out);
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}
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}
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static int sec_skcipher_sgl_map(struct sec_ctx *ctx, struct sec_req *req)
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@ -844,6 +989,9 @@ static int sec_skcipher_bd_fill(struct sec_ctx *ctx, struct sec_req *req)
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cipher = SEC_CIPHER_DEC << SEC_CIPHER_OFFSET;
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sec_sqe->type_cipher_auth = bd_type | cipher;
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if (req->use_pbuf)
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sa_type = SEC_PBUF << SEC_SRC_SGL_OFFSET;
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else
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sa_type = SEC_SGL << SEC_SRC_SGL_OFFSET;
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scene = SEC_COMM_SCENE << SEC_SCENE_OFFSET;
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if (c_req->c_in_dma != c_req->c_out_dma)
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@ -852,6 +1000,9 @@ static int sec_skcipher_bd_fill(struct sec_ctx *ctx, struct sec_req *req)
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sec_sqe->sds_sa_type = (de | scene | sa_type);
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/* Just set DST address type */
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if (req->use_pbuf)
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da_type = SEC_PBUF << SEC_DST_SGL_OFFSET;
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else
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da_type = SEC_SGL << SEC_DST_SGL_OFFSET;
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sec_sqe->sdm_addr_type |= da_type;
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@ -1215,6 +1366,12 @@ static int sec_skcipher_param_check(struct sec_ctx *ctx, struct sec_req *sreq)
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return -EINVAL;
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}
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sreq->c_req.c_len = sk_req->cryptlen;
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if (ctx->pbuf_supported && sk_req->cryptlen <= SEC_PBUF_SZ)
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sreq->use_pbuf = true;
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else
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sreq->use_pbuf = false;
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if (c_alg == SEC_CALG_3DES) {
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if (unlikely(sk_req->cryptlen & (DES3_EDE_BLOCK_SIZE - 1))) {
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dev_err(dev, "skcipher 3des input length error!\n");
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@ -1334,6 +1491,12 @@ static int sec_aead_param_check(struct sec_ctx *ctx, struct sec_req *sreq)
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return -EINVAL;
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}
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if (ctx->pbuf_supported && (req->cryptlen + req->assoclen) <=
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SEC_PBUF_SZ)
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sreq->use_pbuf = true;
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else
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sreq->use_pbuf = false;
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/* Support AES only */
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if (unlikely(c_alg != SEC_CALG_AES)) {
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dev_err(SEC_CTX_DEV(ctx), "aead crypto alg error!\n");
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