staging and iio driver fixes for 4.15-rc3
Here are a number of small staging and iio driver fixes for reported issues for 4.15-rc3. Nothing major here, the majority is IIO issues, like normal, but there are also some small bugfixes for a few staging drivers as well. Full details are in the shortlog. All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWia7tQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ylHgACeNtnYUpuwRUI6K3JOxxClDVUzVRUAn22oMDn7 UlkqSVX7hMeC5jEvO8yj =k+Ek -----END PGP SIGNATURE----- Merge tag 'staging-4.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging and iio driver fixes from Greg KH: "Here are a number of small staging and iio driver fixes for reported issues for 4.15-rc3. Nothing major here, the majority is IIO issues, like normal, but there are also some small bugfixes for a few staging drivers as well. Full details are in the shortlog. All of these have been in linux-next for a while with no reported issues" * tag 'staging-4.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: iio: stm32: fix adc/trigger link error iio: health: max30102: Temperature should be in milli Celsius iio: fix kernel-doc build errors iio: adc: meson-saradc: Meson8 and Meson8b do not have REG11 and REG13 iio: adc: meson-saradc: initialize the bandgap correctly on older SoCs iio: adc: meson-saradc: fix the bit_idx of the adc_en clock iio: proximity: sx9500: Assign interrupt from GpioIo() iio: adc: cpcap: fix incorrect validation staging: octeon-usb: use __delay() instead of cvmx_wait() staging: rtl8188eu: Fix incorrect response to SIOCGIWESSID staging: ccree: fix leak of import() after init() staging: comedi: ni_atmio: fix license warning.
This commit is contained in:
commit
73996933b5
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@ -1011,7 +1011,7 @@ static int cpcap_adc_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, indio_dev);
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ddata->irq = platform_get_irq_byname(pdev, "adcdone");
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if (!ddata->irq)
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if (ddata->irq < 0)
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return -ENODEV;
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error = devm_request_threaded_irq(&pdev->dev, ddata->irq, NULL,
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@ -221,8 +221,10 @@ enum meson_sar_adc_chan7_mux_sel {
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struct meson_sar_adc_data {
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bool has_bl30_integration;
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u32 bandgap_reg;
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unsigned int resolution;
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const char *name;
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const struct regmap_config *regmap_config;
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};
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struct meson_sar_adc_priv {
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@ -242,13 +244,20 @@ struct meson_sar_adc_priv {
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int calibscale;
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};
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static const struct regmap_config meson_sar_adc_regmap_config = {
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static const struct regmap_config meson_sar_adc_regmap_config_gxbb = {
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.reg_bits = 8,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = MESON_SAR_ADC_REG13,
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};
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static const struct regmap_config meson_sar_adc_regmap_config_meson8 = {
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.reg_bits = 8,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = MESON_SAR_ADC_DELTA_10,
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};
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static unsigned int meson_sar_adc_get_fifo_count(struct iio_dev *indio_dev)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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@ -600,7 +609,7 @@ static int meson_sar_adc_clk_init(struct iio_dev *indio_dev,
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init.num_parents = 1;
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priv->clk_gate.reg = base + MESON_SAR_ADC_REG3;
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priv->clk_gate.bit_idx = fls(MESON_SAR_ADC_REG3_CLK_EN);
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priv->clk_gate.bit_idx = __ffs(MESON_SAR_ADC_REG3_CLK_EN);
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priv->clk_gate.hw.init = &init;
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priv->adc_clk = devm_clk_register(&indio_dev->dev, &priv->clk_gate.hw);
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@ -685,6 +694,20 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
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return 0;
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}
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static void meson_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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u32 enable_mask;
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if (priv->data->bandgap_reg == MESON_SAR_ADC_REG11)
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enable_mask = MESON_SAR_ADC_REG11_BANDGAP_EN;
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else
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enable_mask = MESON_SAR_ADC_DELTA_10_TS_VBG_EN;
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regmap_update_bits(priv->regmap, priv->data->bandgap_reg, enable_mask,
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on_off ? enable_mask : 0);
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}
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static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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@ -717,9 +740,9 @@ static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
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regval = FIELD_PREP(MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, 1);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0,
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MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, regval);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
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MESON_SAR_ADC_REG11_BANDGAP_EN,
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MESON_SAR_ADC_REG11_BANDGAP_EN);
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meson_sar_adc_set_bandgap(indio_dev, true);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
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MESON_SAR_ADC_REG3_ADC_EN,
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MESON_SAR_ADC_REG3_ADC_EN);
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@ -739,8 +762,7 @@ static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
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err_adc_clk:
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
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MESON_SAR_ADC_REG3_ADC_EN, 0);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
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MESON_SAR_ADC_REG11_BANDGAP_EN, 0);
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meson_sar_adc_set_bandgap(indio_dev, false);
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clk_disable_unprepare(priv->sana_clk);
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err_sana_clk:
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clk_disable_unprepare(priv->core_clk);
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@ -765,8 +787,8 @@ static int meson_sar_adc_hw_disable(struct iio_dev *indio_dev)
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
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MESON_SAR_ADC_REG3_ADC_EN, 0);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
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MESON_SAR_ADC_REG11_BANDGAP_EN, 0);
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meson_sar_adc_set_bandgap(indio_dev, false);
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clk_disable_unprepare(priv->sana_clk);
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clk_disable_unprepare(priv->core_clk);
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@ -844,30 +866,40 @@ static const struct iio_info meson_sar_adc_iio_info = {
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static const struct meson_sar_adc_data meson_sar_adc_meson8_data = {
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.has_bl30_integration = false,
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.bandgap_reg = MESON_SAR_ADC_DELTA_10,
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.regmap_config = &meson_sar_adc_regmap_config_meson8,
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.resolution = 10,
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.name = "meson-meson8-saradc",
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};
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static const struct meson_sar_adc_data meson_sar_adc_meson8b_data = {
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.has_bl30_integration = false,
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.bandgap_reg = MESON_SAR_ADC_DELTA_10,
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.regmap_config = &meson_sar_adc_regmap_config_meson8,
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.resolution = 10,
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.name = "meson-meson8b-saradc",
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};
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static const struct meson_sar_adc_data meson_sar_adc_gxbb_data = {
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.has_bl30_integration = true,
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.bandgap_reg = MESON_SAR_ADC_REG11,
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.regmap_config = &meson_sar_adc_regmap_config_gxbb,
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.resolution = 10,
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.name = "meson-gxbb-saradc",
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};
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static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
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.has_bl30_integration = true,
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.bandgap_reg = MESON_SAR_ADC_REG11,
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.regmap_config = &meson_sar_adc_regmap_config_gxbb,
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.resolution = 12,
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.name = "meson-gxl-saradc",
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};
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static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
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.has_bl30_integration = true,
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.bandgap_reg = MESON_SAR_ADC_REG11,
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.regmap_config = &meson_sar_adc_regmap_config_gxbb,
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.resolution = 12,
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.name = "meson-gxm-saradc",
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};
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@ -945,7 +977,7 @@ static int meson_sar_adc_probe(struct platform_device *pdev)
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return ret;
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priv->regmap = devm_regmap_init_mmio(&pdev->dev, base,
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&meson_sar_adc_regmap_config);
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priv->data->regmap_config);
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if (IS_ERR(priv->regmap))
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return PTR_ERR(priv->regmap);
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@ -371,7 +371,7 @@ static int max30102_read_raw(struct iio_dev *indio_dev,
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mutex_unlock(&indio_dev->mlock);
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break;
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case IIO_CHAN_INFO_SCALE:
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*val = 1; /* 0.0625 */
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*val = 1000; /* 62.5 */
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*val2 = 16;
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ret = IIO_VAL_FRACTIONAL;
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break;
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@ -631,7 +631,7 @@ static ssize_t __iio_format_value(char *buf, size_t len, unsigned int type,
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* iio_format_value() - Formats a IIO value into its string representation
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* @buf: The buffer to which the formatted value gets written
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* which is assumed to be big enough (i.e. PAGE_SIZE).
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* @type: One of the IIO_VAL_... constants. This decides how the val
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* @type: One of the IIO_VAL_* constants. This decides how the val
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* and val2 parameters are formatted.
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* @size: Number of IIO value entries contained in vals
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* @vals: Pointer to the values, exact meaning depends on the
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*
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* Return: 0 by default, a negative number on failure or the
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* total number of characters written for a type that belongs
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* to the IIO_VAL_... constant.
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* to the IIO_VAL_* constant.
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*/
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ssize_t iio_format_value(char *buf, unsigned int type, int size, int *vals)
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{
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@ -869,6 +869,7 @@ static int sx9500_init_device(struct iio_dev *indio_dev)
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static void sx9500_gpio_probe(struct i2c_client *client,
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struct sx9500_data *data)
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{
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struct gpio_desc *gpiod_int;
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struct device *dev;
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if (!client)
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dev = &client->dev;
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if (client->irq <= 0) {
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gpiod_int = devm_gpiod_get(dev, SX9500_GPIO_INT, GPIOD_IN);
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if (IS_ERR(gpiod_int))
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dev_err(dev, "gpio get irq failed\n");
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else
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client->irq = gpiod_to_irq(gpiod_int);
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}
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data->gpiod_rst = devm_gpiod_get(dev, SX9500_GPIO_RESET, GPIOD_OUT_HIGH);
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if (IS_ERR(data->gpiod_rst)) {
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dev_warn(dev, "gpio get reset pin failed\n");
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@ -1778,9 +1778,12 @@ static int ssi_ahash_import(struct ahash_request *req, const void *in)
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}
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in += sizeof(u32);
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rc = ssi_hash_init(state, ctx);
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if (rc)
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goto out;
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/* call init() to allocate bufs if the user hasn't */
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if (!state->digest_buff) {
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rc = ssi_hash_init(state, ctx);
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if (rc)
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goto out;
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}
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dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr,
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ctx->inter_digestsize, DMA_BIDIRECTIONAL);
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@ -361,3 +361,8 @@ static struct comedi_driver ni_atmio_driver = {
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.detach = ni_atmio_detach,
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};
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module_comedi_driver(ni_atmio_driver);
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MODULE_AUTHOR("Comedi http://www.comedi.org");
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MODULE_DESCRIPTION("Comedi low-level driver");
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MODULE_LICENSE("GPL");
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@ -394,7 +394,7 @@ struct octeon_hcd {
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result = -1; \
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break; \
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} else \
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cvmx_wait(100); \
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__delay(100); \
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} \
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} while (0); \
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result; })
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@ -774,7 +774,7 @@ retry:
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usbn_clk_ctl.s.hclk_rst = 1;
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cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
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/* 2e. Wait 64 core-clock cycles for HCLK to stabilize */
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cvmx_wait(64);
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__delay(64);
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/*
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* 3. Program the power-on reset field in the USBN clock-control
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* register:
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@ -795,7 +795,7 @@ retry:
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cvmx_write64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index),
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usbn_usbp_ctl_status.u64);
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/* 6. Wait 10 cycles */
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cvmx_wait(10);
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__delay(10);
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/*
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* 7. Clear ATE_RESET field in the USBN clock-control register:
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* USBN_USBP_CTL_STATUS[ATE_RESET] = 0
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@ -1395,19 +1395,13 @@ static int rtw_wx_get_essid(struct net_device *dev,
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if ((check_fwstate(pmlmepriv, _FW_LINKED)) ||
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(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))) {
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len = pcur_bss->Ssid.SsidLength;
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wrqu->essid.length = len;
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memcpy(extra, pcur_bss->Ssid.Ssid, len);
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wrqu->essid.flags = 1;
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} else {
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ret = -1;
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goto exit;
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len = 0;
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*extra = 0;
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}
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exit:
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wrqu->essid.length = len;
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wrqu->essid.flags = 1;
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return ret;
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}
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@ -16,11 +16,14 @@
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#define LPTIM2_OUT "lptim2_out"
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#define LPTIM3_OUT "lptim3_out"
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#if IS_ENABLED(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
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#if IS_REACHABLE(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
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bool is_stm32_lptim_trigger(struct iio_trigger *trig);
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#else
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static inline bool is_stm32_lptim_trigger(struct iio_trigger *trig)
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{
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#if IS_ENABLED(CONFIG_IIO_STM32_LPTIMER_TRIGGER)
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pr_warn_once("stm32 lptim_trigger not linked in\n");
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#endif
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return false;
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}
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#endif
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