scsi: hisi_sas: Fix warnings detected by sparse
This patchset fixes some warnings detected by the sparse tool, like these: drivers/scsi/hisi_sas/hisi_sas_main.c:1469:52: warning: incorrect type in assignment (different base types) drivers/scsi/hisi_sas/hisi_sas_main.c:1469:52: expected unsigned short [unsigned] [assigned] [usertype] tag_of_task_to_be_managed drivers/scsi/hisi_sas/hisi_sas_main.c:1469:52: got restricted __le16 [usertype] <noident> drivers/scsi/hisi_sas/hisi_sas_main.c:1723:52: warning: incorrect type in assignment (different base types) drivers/scsi/hisi_sas/hisi_sas_main.c:1723:52: expected unsigned short [unsigned] [assigned] [usertype] tag_of_task_to_be_managed drivers/scsi/hisi_sas/hisi_sas_main.c:1723:52: got restricted __le16 [usertype] <noident> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
parent
86d540ff33
commit
735bcc77e6
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@ -211,7 +211,7 @@ struct hisi_sas_slot {
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/* Do not reorder/change members after here */
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void *buf;
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dma_addr_t buf_dma;
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int idx;
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u16 idx;
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};
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struct hisi_sas_hw {
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@ -1461,12 +1461,12 @@ static int hisi_sas_abort_task(struct sas_task *task)
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if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
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struct scsi_cmnd *cmnd = task->uldd_task;
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struct hisi_sas_slot *slot = task->lldd_task;
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u32 tag = slot->idx;
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u16 tag = slot->idx;
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int rc2;
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int_to_scsilun(cmnd->device->lun, &lun);
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tmf_task.tmf = TMF_ABORT_TASK;
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tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
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tmf_task.tag_of_task_to_be_managed = tag;
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rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun,
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&tmf_task);
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@ -1720,7 +1720,7 @@ static int hisi_sas_query_task(struct sas_task *task)
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int_to_scsilun(cmnd->device->lun, &lun);
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tmf_task.tmf = TMF_QUERY_TASK;
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tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
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tmf_task.tag_of_task_to_be_managed = tag;
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rc = hisi_sas_debug_issue_ssp_tmf(device,
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lun.scsi_lun,
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@ -510,6 +510,7 @@ static void setup_itct_v1_hw(struct hisi_hba *hisi_hba,
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struct hisi_sas_itct *itct = &hisi_hba->itct[device_id];
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struct asd_sas_port *sas_port = device->port;
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struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
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u64 sas_addr;
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memset(itct, 0, sizeof(*itct));
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@ -534,8 +535,8 @@ static void setup_itct_v1_hw(struct hisi_hba *hisi_hba,
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itct->qw0 = cpu_to_le64(qw0);
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/* qw1 */
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memcpy(&itct->sas_addr, device->sas_addr, SAS_ADDR_SIZE);
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itct->sas_addr = __swab64(itct->sas_addr);
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memcpy(&sas_addr, device->sas_addr, SAS_ADDR_SIZE);
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itct->sas_addr = cpu_to_le64(__swab64(sas_addr));
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/* qw2 */
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itct->qw2 = cpu_to_le64((500ULL << ITCT_HDR_IT_NEXUS_LOSS_TL_OFF) |
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@ -561,7 +562,7 @@ static void clear_itct_v1_hw(struct hisi_hba *hisi_hba,
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reg_val &= ~CFG_AGING_TIME_ITCT_REL_MSK;
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hisi_sas_write32(hisi_hba, CFG_AGING_TIME, reg_val);
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qw0 = cpu_to_le64(itct->qw0);
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qw0 = le64_to_cpu(itct->qw0);
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qw0 &= ~ITCT_HDR_VALID_MSK;
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itct->qw0 = cpu_to_le64(qw0);
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}
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@ -1102,7 +1103,7 @@ static void slot_err_v1_hw(struct hisi_hba *hisi_hba,
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case SAS_PROTOCOL_SSP:
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{
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int error = -1;
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u32 dma_err_type = cpu_to_le32(err_record->dma_err_type);
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u32 dma_err_type = le32_to_cpu(err_record->dma_err_type);
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u32 dma_tx_err_type = ((dma_err_type &
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ERR_HDR_DMA_TX_ERR_TYPE_MSK)) >>
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ERR_HDR_DMA_TX_ERR_TYPE_OFF;
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@ -1110,9 +1111,9 @@ static void slot_err_v1_hw(struct hisi_hba *hisi_hba,
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ERR_HDR_DMA_RX_ERR_TYPE_MSK)) >>
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ERR_HDR_DMA_RX_ERR_TYPE_OFF;
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u32 trans_tx_fail_type =
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cpu_to_le32(err_record->trans_tx_fail_type);
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le32_to_cpu(err_record->trans_tx_fail_type);
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u32 trans_rx_fail_type =
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cpu_to_le32(err_record->trans_rx_fail_type);
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le32_to_cpu(err_record->trans_rx_fail_type);
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if (dma_tx_err_type) {
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/* dma tx err */
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@ -1560,7 +1561,7 @@ static irqreturn_t cq_interrupt_v1_hw(int irq, void *p)
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u32 cmplt_hdr_data;
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complete_hdr = &complete_queue[rd_point];
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cmplt_hdr_data = cpu_to_le32(complete_hdr->data);
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cmplt_hdr_data = le32_to_cpu(complete_hdr->data);
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idx = (cmplt_hdr_data & CMPLT_HDR_IPTT_MSK) >>
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CMPLT_HDR_IPTT_OFF;
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slot = &hisi_hba->slot_info[idx];
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@ -934,6 +934,7 @@ static void setup_itct_v2_hw(struct hisi_hba *hisi_hba,
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struct domain_device *parent_dev = device->parent;
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struct asd_sas_port *sas_port = device->port;
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struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
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u64 sas_addr;
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memset(itct, 0, sizeof(*itct));
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@ -966,8 +967,8 @@ static void setup_itct_v2_hw(struct hisi_hba *hisi_hba,
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itct->qw0 = cpu_to_le64(qw0);
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/* qw1 */
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memcpy(&itct->sas_addr, device->sas_addr, SAS_ADDR_SIZE);
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itct->sas_addr = __swab64(itct->sas_addr);
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memcpy(&sas_addr, device->sas_addr, SAS_ADDR_SIZE);
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itct->sas_addr = cpu_to_le64(__swab64(sas_addr));
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/* qw2 */
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if (!dev_is_sata(device))
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@ -2046,11 +2047,11 @@ static void slot_err_v2_hw(struct hisi_hba *hisi_hba,
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struct task_status_struct *ts = &task->task_status;
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struct hisi_sas_err_record_v2 *err_record =
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hisi_sas_status_buf_addr_mem(slot);
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u32 trans_tx_fail_type = cpu_to_le32(err_record->trans_tx_fail_type);
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u32 trans_rx_fail_type = cpu_to_le32(err_record->trans_rx_fail_type);
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u16 dma_tx_err_type = cpu_to_le16(err_record->dma_tx_err_type);
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u16 sipc_rx_err_type = cpu_to_le16(err_record->sipc_rx_err_type);
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u32 dma_rx_err_type = cpu_to_le32(err_record->dma_rx_err_type);
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u32 trans_tx_fail_type = le32_to_cpu(err_record->trans_tx_fail_type);
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u32 trans_rx_fail_type = le32_to_cpu(err_record->trans_rx_fail_type);
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u16 dma_tx_err_type = le16_to_cpu(err_record->dma_tx_err_type);
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u16 sipc_rx_err_type = le16_to_cpu(err_record->sipc_rx_err_type);
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u32 dma_rx_err_type = le32_to_cpu(err_record->dma_rx_err_type);
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int error = -1;
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if (err_phase == 1) {
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@ -2061,8 +2062,7 @@ static void slot_err_v2_hw(struct hisi_hba *hisi_hba,
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trans_tx_fail_type);
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} else if (err_phase == 2) {
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/* error in RX phase, the priority is: DW1 > DW3 > DW2 */
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error = parse_trans_rx_err_code_v2_hw(
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trans_rx_fail_type);
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error = parse_trans_rx_err_code_v2_hw(trans_rx_fail_type);
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if (error == -1) {
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error = parse_dma_rx_err_code_v2_hw(
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dma_rx_err_type);
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@ -2360,6 +2360,7 @@ slot_complete_v2_hw(struct hisi_hba *hisi_hba, struct hisi_sas_slot *slot)
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&complete_queue[slot->cmplt_queue_slot];
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unsigned long flags;
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bool is_internal = slot->is_internal;
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u32 dw0;
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if (unlikely(!task || !task->lldd_task || !task->dev))
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return -EINVAL;
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@ -2384,8 +2385,9 @@ slot_complete_v2_hw(struct hisi_hba *hisi_hba, struct hisi_sas_slot *slot)
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}
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/* Use SAS+TMF status codes */
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switch ((complete_hdr->dw0 & CMPLT_HDR_ABORT_STAT_MSK)
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>> CMPLT_HDR_ABORT_STAT_OFF) {
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dw0 = le32_to_cpu(complete_hdr->dw0);
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switch ((dw0 & CMPLT_HDR_ABORT_STAT_MSK) >>
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CMPLT_HDR_ABORT_STAT_OFF) {
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case STAT_IO_ABORTED:
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/* this io has been aborted by abort command */
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ts->stat = SAS_ABORTED_TASK;
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@ -2410,9 +2412,8 @@ slot_complete_v2_hw(struct hisi_hba *hisi_hba, struct hisi_sas_slot *slot)
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break;
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}
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if ((complete_hdr->dw0 & CMPLT_HDR_ERX_MSK) &&
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(!(complete_hdr->dw0 & CMPLT_HDR_RSPNS_XFRD_MSK))) {
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u32 err_phase = (complete_hdr->dw0 & CMPLT_HDR_ERR_PHASE_MSK)
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if ((dw0 & CMPLT_HDR_ERX_MSK) && (!(dw0 & CMPLT_HDR_RSPNS_XFRD_MSK))) {
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u32 err_phase = (dw0 & CMPLT_HDR_ERR_PHASE_MSK)
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>> CMPLT_HDR_ERR_PHASE_OFF;
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u32 *error_info = hisi_sas_status_buf_addr_mem(slot);
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@ -2528,22 +2529,23 @@ static void prep_ata_v2_hw(struct hisi_hba *hisi_hba,
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struct hisi_sas_tmf_task *tmf = slot->tmf;
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u8 *buf_cmd;
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int has_data = 0, hdr_tag = 0;
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u32 dw1 = 0, dw2 = 0;
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u32 dw0, dw1 = 0, dw2 = 0;
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/* create header */
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/* dw0 */
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hdr->dw0 = cpu_to_le32(port->id << CMD_HDR_PORT_OFF);
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dw0 = port->id << CMD_HDR_PORT_OFF;
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if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type))
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hdr->dw0 |= cpu_to_le32(3 << CMD_HDR_CMD_OFF);
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dw0 |= 3 << CMD_HDR_CMD_OFF;
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else
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hdr->dw0 |= cpu_to_le32(4 << CMD_HDR_CMD_OFF);
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dw0 |= 4 << CMD_HDR_CMD_OFF;
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if (tmf && tmf->force_phy) {
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hdr->dw0 |= CMD_HDR_FORCE_PHY_MSK;
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hdr->dw0 |= cpu_to_le32((1 << tmf->phy_id)
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<< CMD_HDR_PHY_ID_OFF);
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dw0 |= CMD_HDR_FORCE_PHY_MSK;
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dw0 |= (1 << tmf->phy_id) << CMD_HDR_PHY_ID_OFF;
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}
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hdr->dw0 = cpu_to_le32(dw0);
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/* dw1 */
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switch (task->data_dir) {
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case DMA_TO_DEVICE:
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@ -3154,20 +3156,24 @@ static void cq_tasklet_v2_hw(unsigned long val)
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/* Check for NCQ completion */
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if (complete_hdr->act) {
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u32 act_tmp = complete_hdr->act;
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u32 act_tmp = le32_to_cpu(complete_hdr->act);
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int ncq_tag_count = ffs(act_tmp);
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u32 dw1 = le32_to_cpu(complete_hdr->dw1);
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dev_id = (complete_hdr->dw1 & CMPLT_HDR_DEV_ID_MSK) >>
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dev_id = (dw1 & CMPLT_HDR_DEV_ID_MSK) >>
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CMPLT_HDR_DEV_ID_OFF;
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itct = &hisi_hba->itct[dev_id];
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/* The NCQ tags are held in the itct header */
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while (ncq_tag_count) {
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__le64 *ncq_tag = &itct->qw4_15[0];
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__le64 *_ncq_tag = &itct->qw4_15[0], __ncq_tag;
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u64 ncq_tag;
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ncq_tag_count -= 1;
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iptt = (ncq_tag[ncq_tag_count / 5]
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>> (ncq_tag_count % 5) * 12) & 0xfff;
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ncq_tag_count--;
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__ncq_tag = _ncq_tag[ncq_tag_count / 5];
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ncq_tag = le64_to_cpu(__ncq_tag);
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iptt = (ncq_tag >> (ncq_tag_count % 5) * 12) &
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0xfff;
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slot = &hisi_hba->slot_info[iptt];
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slot->cmplt_queue_slot = rd_point;
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@ -3178,7 +3184,9 @@ static void cq_tasklet_v2_hw(unsigned long val)
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ncq_tag_count = ffs(act_tmp);
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}
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} else {
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iptt = (complete_hdr->dw1) & CMPLT_HDR_IPTT_MSK;
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u32 dw1 = le32_to_cpu(complete_hdr->dw1);
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iptt = dw1 & CMPLT_HDR_IPTT_MSK;
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slot = &hisi_hba->slot_info[iptt];
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slot->cmplt_queue_slot = rd_point;
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slot->cmplt_queue = queue;
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@ -3554,7 +3562,7 @@ static void wait_cmds_complete_timeout_v2_hw(struct hisi_hba *hisi_hba,
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dev_dbg(dev, "wait commands complete %dms\n", time);
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}
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struct device_attribute *host_attrs_v2_hw[] = {
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static struct device_attribute *host_attrs_v2_hw[] = {
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&dev_attr_phy_event_threshold,
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NULL
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};
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@ -628,6 +628,7 @@ static void setup_itct_v3_hw(struct hisi_hba *hisi_hba,
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struct domain_device *parent_dev = device->parent;
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struct asd_sas_port *sas_port = device->port;
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struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
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u64 sas_addr;
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memset(itct, 0, sizeof(*itct));
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@ -660,8 +661,8 @@ static void setup_itct_v3_hw(struct hisi_hba *hisi_hba,
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itct->qw0 = cpu_to_le64(qw0);
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/* qw1 */
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memcpy(&itct->sas_addr, device->sas_addr, SAS_ADDR_SIZE);
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itct->sas_addr = __swab64(itct->sas_addr);
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memcpy(&sas_addr, device->sas_addr, SAS_ADDR_SIZE);
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itct->sas_addr = cpu_to_le64(__swab64(sas_addr));
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/* qw2 */
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if (!dev_is_sata(device))
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@ -1592,15 +1593,16 @@ slot_err_v3_hw(struct hisi_hba *hisi_hba, struct sas_task *task,
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&complete_queue[slot->cmplt_queue_slot];
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struct hisi_sas_err_record_v3 *record =
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hisi_sas_status_buf_addr_mem(slot);
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u32 dma_rx_err_type = record->dma_rx_err_type;
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u32 trans_tx_fail_type = record->trans_tx_fail_type;
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u32 dma_rx_err_type = le32_to_cpu(record->dma_rx_err_type);
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u32 trans_tx_fail_type = le32_to_cpu(record->trans_tx_fail_type);
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u32 dw3 = le32_to_cpu(complete_hdr->dw3);
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switch (task->task_proto) {
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case SAS_PROTOCOL_SSP:
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if (dma_rx_err_type & RX_DATA_LEN_UNDERFLOW_MSK) {
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ts->residual = trans_tx_fail_type;
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ts->stat = SAS_DATA_UNDERRUN;
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} else if (complete_hdr->dw3 & CMPLT_HDR_IO_IN_TARGET_MSK) {
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} else if (dw3 & CMPLT_HDR_IO_IN_TARGET_MSK) {
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ts->stat = SAS_QUEUE_FULL;
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slot->abort = 1;
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} else {
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@ -1614,7 +1616,7 @@ slot_err_v3_hw(struct hisi_hba *hisi_hba, struct sas_task *task,
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if (dma_rx_err_type & RX_DATA_LEN_UNDERFLOW_MSK) {
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ts->residual = trans_tx_fail_type;
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ts->stat = SAS_DATA_UNDERRUN;
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} else if (complete_hdr->dw3 & CMPLT_HDR_IO_IN_TARGET_MSK) {
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} else if (dw3 & CMPLT_HDR_IO_IN_TARGET_MSK) {
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ts->stat = SAS_PHY_DOWN;
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slot->abort = 1;
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} else {
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@ -1647,6 +1649,7 @@ slot_complete_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_slot *slot)
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&complete_queue[slot->cmplt_queue_slot];
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unsigned long flags;
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bool is_internal = slot->is_internal;
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u32 dw0, dw1, dw3;
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if (unlikely(!task || !task->lldd_task || !task->dev))
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return -EINVAL;
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@ -1670,11 +1673,14 @@ slot_complete_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_slot *slot)
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goto out;
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}
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dw0 = le32_to_cpu(complete_hdr->dw0);
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dw1 = le32_to_cpu(complete_hdr->dw1);
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dw3 = le32_to_cpu(complete_hdr->dw3);
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/*
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* Use SAS+TMF status codes
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*/
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switch ((complete_hdr->dw0 & CMPLT_HDR_ABORT_STAT_MSK)
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>> CMPLT_HDR_ABORT_STAT_OFF) {
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switch ((dw0 & CMPLT_HDR_ABORT_STAT_MSK) >> CMPLT_HDR_ABORT_STAT_OFF) {
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case STAT_IO_ABORTED:
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/* this IO has been aborted by abort command */
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ts->stat = SAS_ABORTED_TASK;
|
||||
|
@ -1697,7 +1703,7 @@ slot_complete_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_slot *slot)
|
|||
}
|
||||
|
||||
/* check for erroneous completion */
|
||||
if ((complete_hdr->dw0 & CMPLT_HDR_CMPLT_MSK) == 0x3) {
|
||||
if ((dw0 & CMPLT_HDR_CMPLT_MSK) == 0x3) {
|
||||
u32 *error_info = hisi_sas_status_buf_addr_mem(slot);
|
||||
|
||||
slot_err_v3_hw(hisi_hba, task, slot);
|
||||
|
@ -1706,8 +1712,7 @@ slot_complete_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_slot *slot)
|
|||
"CQ hdr: 0x%x 0x%x 0x%x 0x%x "
|
||||
"Error info: 0x%x 0x%x 0x%x 0x%x\n",
|
||||
slot->idx, task, sas_dev->device_id,
|
||||
complete_hdr->dw0, complete_hdr->dw1,
|
||||
complete_hdr->act, complete_hdr->dw3,
|
||||
dw0, dw1, complete_hdr->act, dw3,
|
||||
error_info[0], error_info[1],
|
||||
error_info[2], error_info[3]);
|
||||
if (unlikely(slot->abort))
|
||||
|
@ -1805,11 +1810,13 @@ static void cq_tasklet_v3_hw(unsigned long val)
|
|||
while (rd_point != wr_point) {
|
||||
struct hisi_sas_complete_v3_hdr *complete_hdr;
|
||||
struct device *dev = hisi_hba->dev;
|
||||
u32 dw1;
|
||||
int iptt;
|
||||
|
||||
complete_hdr = &complete_queue[rd_point];
|
||||
dw1 = le32_to_cpu(complete_hdr->dw1);
|
||||
|
||||
iptt = (complete_hdr->dw1) & CMPLT_HDR_IPTT_MSK;
|
||||
iptt = dw1 & CMPLT_HDR_IPTT_MSK;
|
||||
if (likely(iptt < HISI_SAS_COMMAND_ENTRIES_V3_HW)) {
|
||||
slot = &hisi_hba->slot_info[iptt];
|
||||
slot->cmplt_queue_slot = rd_point;
|
||||
|
@ -2205,7 +2212,7 @@ static ssize_t intr_coal_count_v3_hw_store(struct device *dev,
|
|||
}
|
||||
static DEVICE_ATTR_RW(intr_coal_count_v3_hw);
|
||||
|
||||
struct device_attribute *host_attrs_v3_hw[] = {
|
||||
static struct device_attribute *host_attrs_v3_hw[] = {
|
||||
&dev_attr_phy_event_threshold,
|
||||
&dev_attr_intr_conv_v3_hw,
|
||||
&dev_attr_intr_coal_ticks_v3_hw,
|
||||
|
@ -2651,7 +2658,7 @@ static int hisi_sas_v3_suspend(struct pci_dev *pdev, pm_message_t state)
|
|||
struct hisi_hba *hisi_hba = sha->lldd_ha;
|
||||
struct device *dev = hisi_hba->dev;
|
||||
struct Scsi_Host *shost = hisi_hba->shost;
|
||||
u32 device_state;
|
||||
pci_power_t device_state;
|
||||
int rc;
|
||||
|
||||
if (!pdev->pm_cap) {
|
||||
|
@ -2697,7 +2704,7 @@ static int hisi_sas_v3_resume(struct pci_dev *pdev)
|
|||
struct Scsi_Host *shost = hisi_hba->shost;
|
||||
struct device *dev = hisi_hba->dev;
|
||||
unsigned int rc;
|
||||
u32 device_state = pdev->current_state;
|
||||
pci_power_t device_state = pdev->current_state;
|
||||
|
||||
dev_warn(dev, "resuming from operating state [D%d]\n",
|
||||
device_state);
|
||||
|
|
Loading…
Reference in New Issue