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Merge branch irq/misc-6.1 into irq/irqchip-next 

* irq/misc-6.1:
  : .
  : Misc irqchip updates for 6.1:
  :
  : - Allow generic irqchip support without selecting CONFIG_OF_IRQ
  :
  : - Fix a couple of bindings for TI interrupts controllers
  :
  : - Yet another binding update for a Renesas SoC
  :
  : - The obligatory fixes from the spelling police
  : .
  dt-bindings: irqchip: renesas,irqc: Add r8a779g0 support
  irqchip/gic-v3: Fix typo in comment
  dt-bindings: interrupt-controller: ti,sci-intr: Fix missing reg property in the binding
  dt-bindings: irqchip: ti,sci-inta: Fix warning for missing #interrupt-cells
  irqchip: Make irqchip_init() usable on pure ACPI systems

Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
Marc Zyngier 2022-09-29 17:21:16 +01:00
parent aa28080873 872f3a4e90
commit 732d69c80c
6 changed files with 13 additions and 4 deletions
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1
Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml
View File

@ -37,6 +37,7 @@ properties:
- renesas,intc-ex-r8a77990 # R-Car E3
- renesas,intc-ex-r8a77995 # R-Car D3
- renesas,intc-ex-r8a779a0 # R-Car V3U
- renesas,intc-ex-r8a779g0 # R-Car V4H
- const: renesas,irqc
'#interrupt-cells':

3
Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml
View File

@ -59,6 +59,9 @@ properties:
interrupt-controller: true
'#interrupt-cells':
const: 0
msi-controller: true
ti,interrupt-ranges:

3
Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
View File

@ -58,6 +58,9 @@ properties:
1 = If intr supports edge triggered interrupts.
4 = If intr supports level triggered interrupts.
reg:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':

2
drivers/irqchip/Kconfig
View File

@ -3,7 +3,7 @@ menu "IRQ chip support"
config IRQCHIP
def_bool y
depends on OF_IRQ
depends on (OF_IRQ || ACPI_GENERIC_GSI)
config ARM_GIC
bool

2
drivers/irqchip/irq-gic-v3.c
View File

@ -978,7 +978,7 @@ static int __gic_update_rdist_properties(struct redist_region *region,
u64 typer = gic_read_typer(ptr + GICR_TYPER);
u32 ctlr = readl_relaxed(ptr + GICR_CTLR);
/* Boot-time cleanip */
/* Boot-time cleanup */
if ((typer & GICR_TYPER_VLPIS) && (typer & GICR_TYPER_RVPEID)) {
u64 val;

6
include/linux/of_irq.h
View File

@ -37,9 +37,8 @@ extern unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data);
extern int of_irq_to_resource(struct device_node *dev, int index,
struct resource *r);
extern void of_irq_init(const struct of_device_id *matches);
#ifdef CONFIG_OF_IRQ
extern void of_irq_init(const struct of_device_id *matches);
extern int of_irq_parse_one(struct device_node *device, int index,
struct of_phandle_args *out_irq);
extern int of_irq_count(struct device_node *dev);
@ -57,6 +56,9 @@ extern struct irq_domain *of_msi_map_get_device_domain(struct device *dev,
extern void of_msi_configure(struct device *dev, struct device_node *np);
u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_in);
#else
static inline void of_irq_init(const struct of_device_id *matches)
{
}
static inline int of_irq_parse_one(struct device_node *device, int index,
struct of_phandle_args *out_irq)
{