[ARM] 3827/1: iop3xx: add common gpio module
Implement the gpio_line_{config,get,set} API for iop3xx. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -2,7 +2,7 @@
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# Makefile for the linux kernel.
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# Makefile for the linux kernel.
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#
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#
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obj-y := i2c.o pci.o setup.o time.o
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obj-y := gpio.o i2c.o pci.o setup.o time.o
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obj-m :=
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obj-m :=
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obj-n :=
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obj-n :=
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obj- :=
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obj- :=
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@ -0,0 +1,48 @@
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/*
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* arch/arm/plat-iop/gpio.c
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* GPIO handling for Intel IOP3xx processors.
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <linux/device.h>
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#include <asm/hardware/iop3xx.h>
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void gpio_line_config(int line, int direction)
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{
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unsigned long flags;
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local_irq_save(flags);
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if (direction == GPIO_IN) {
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*IOP3XX_GPOE |= 1 << line;
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} else if (direction == GPIO_OUT) {
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*IOP3XX_GPOE &= ~(1 << line);
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}
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(gpio_line_config);
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int gpio_line_get(int line)
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{
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return !!(*IOP3XX_GPID & (1 << line));
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}
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EXPORT_SYMBOL(gpio_line_get);
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void gpio_line_set(int line, int value)
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{
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unsigned long flags;
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local_irq_save(flags);
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if (value == GPIO_LOW) {
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*IOP3XX_GPOD &= ~(1 << line);
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} else if (value == GPIO_HIGH) {
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*IOP3XX_GPOD |= 1 << line;
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}
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(gpio_line_set);
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@ -82,14 +82,16 @@ iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap)
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/*
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/*
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* Every time unit enable is asserted, GPOD needs to be cleared
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* Every time unit enable is asserted, GPOD needs to be cleared
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* on IOP32X to avoid data corruption on the bus.
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* on IOP3XX to avoid data corruption on the bus.
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*/
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*/
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#ifdef CONFIG_ARCH_IOP32X
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#ifdef CONFIG_PLAT_IOP
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#define IOP321_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */
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if (iop3xx_adap->id == 0) {
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#define IOP321_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */
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gpio_line_set(IOP3XX_GPIO_LINE(7), GPIO_LOW);
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gpio_line_set(IOP3XX_GPIO_LINE(6), GPIO_LOW);
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*IOP321_GPOD &= (iop3xx_adap->id == 0) ? ~IOP321_GPOD_I2C0 :
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} else {
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~IOP321_GPOD_I2C1;
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gpio_line_set(IOP3XX_GPIO_LINE(5), GPIO_LOW);
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gpio_line_set(IOP3XX_GPIO_LINE(4), GPIO_LOW);
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}
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#endif
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#endif
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/* NB SR bits not same position as CR IE bits :-( */
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/* NB SR bits not same position as CR IE bits :-( */
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iop3xx_adap->SR_enabled =
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iop3xx_adap->SR_enabled =
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@ -216,6 +216,7 @@
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* Peripherals that are shared between the iop32x and iop33x but
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* Peripherals that are shared between the iop32x and iop33x but
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* located at different addresses.
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* located at different addresses.
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*/
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*/
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#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg))
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#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
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#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
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#include <asm/hardware/iop3xx.h>
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#include <asm/hardware/iop3xx.h>
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* Peripherals that are shared between the iop32x and iop33x but
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* Peripherals that are shared between the iop32x and iop33x but
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* located at different addresses.
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* located at different addresses.
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*/
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*/
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#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
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#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
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#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
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#include <asm/hardware/iop3xx.h>
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#include <asm/hardware/iop3xx.h>
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#ifndef __IOP3XX_H
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#ifndef __IOP3XX_H
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#define __IOP3XX_H
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#define __IOP3XX_H
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/*
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* IOP3XX GPIO handling
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*/
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#define GPIO_IN 0
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#define GPIO_OUT 1
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#define GPIO_LOW 0
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#define GPIO_HIGH 1
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#define IOP3XX_GPIO_LINE(x) (x)
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#ifndef __ASSEMBLY__
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extern void gpio_line_config(int line, int direction);
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extern int gpio_line_get(int line);
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extern void gpio_line_set(int line, int value);
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#endif
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/*
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/*
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* IOP3XX processor registers
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* IOP3XX processor registers
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*/
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*/
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#define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4)
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#define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4)
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#define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec)
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#define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec)
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/* General Purpose I/O */
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#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0004)
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#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0008)
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#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x000c)
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/* Timers */
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/* Timers */
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#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000)
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#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000)
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#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004)
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#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004)
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