[ARM] pxa: update pxafb to use clk support
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -37,6 +37,8 @@
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#include <linux/cpufreq.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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@ -506,15 +508,15 @@ static struct fb_ops pxafb_ops = {
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*
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* Factoring the 10^4 and 10^-12 out gives 10^-8 == 1 / 100000000 as used below.
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*/
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static inline unsigned int get_pcd(unsigned int pixclock)
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static inline unsigned int get_pcd(struct pxafb_info *fbi, unsigned int pixclock)
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{
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unsigned long long pcd;
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/* FIXME: Need to take into account Double Pixel Clock mode
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* (DPC) bit? or perhaps set it based on the various clock
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* speeds */
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pcd = (unsigned long long)get_lcdclk_frequency_10khz() * pixclock;
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* (DPC) bit? or perhaps set it based on the various clock
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* speeds */
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pcd = (unsigned long long)(clk_get_rate(fbi->clk) / 10000);
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pcd *= pixclock;
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do_div(pcd, 100000000 * 2);
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/* no need for this, since we should subtract 1 anyway. they cancel */
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/* pcd += 1; */ /* make up for integer math truncations */
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@ -523,19 +525,21 @@ static inline unsigned int get_pcd(unsigned int pixclock)
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/*
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* Some touchscreens need hsync information from the video driver to
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* function correctly. We export it here.
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* function correctly. We export it here. Note that 'hsync_time' and
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* the value returned from pxafb_get_hsync_time() is the *reciprocal*
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* of the hsync period in seconds.
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*/
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static inline void set_hsync_time(struct pxafb_info *fbi, unsigned int pcd)
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{
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unsigned long long htime;
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unsigned long htime;
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if ((pcd == 0) || (fbi->fb.var.hsync_len == 0)) {
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fbi->hsync_time=0;
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return;
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}
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htime = (unsigned long long)get_lcdclk_frequency_10khz() * 10000;
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do_div(htime, pcd * fbi->fb.var.hsync_len);
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htime = clk_get_rate(fbi->clk) / (pcd * fbi->fb.var.hsync_len);
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fbi->hsync_time = htime;
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}
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@ -560,7 +564,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *
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{
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struct pxafb_lcd_reg new_regs;
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u_long flags;
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u_int lines_per_panel, pcd = get_pcd(var->pixclock);
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u_int lines_per_panel, pcd = get_pcd(fbi, var->pixclock);
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pr_debug("pxafb: Configuring PXA LCD\n");
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@ -803,7 +807,7 @@ static void pxafb_enable_controller(struct pxafb_info *fbi)
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pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3);
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/* enable LCD controller clock */
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pxa_set_cken(CKEN_LCD, 1);
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clk_enable(fbi->clk);
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/* Sequence from 11.7.10 */
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LCCR3 = fbi->reg_lccr3;
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@ -840,7 +844,7 @@ static void pxafb_disable_controller(struct pxafb_info *fbi)
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remove_wait_queue(&fbi->ctrlr_wait, &wait);
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/* disable LCD controller clock */
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pxa_set_cken(CKEN_LCD, 0);
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clk_disable(fbi->clk);
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}
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/*
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@ -994,7 +998,7 @@ pxafb_freq_transition(struct notifier_block *nb, unsigned long val, void *data)
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break;
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case CPUFREQ_POSTCHANGE:
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pcd = get_pcd(fbi->fb.var.pixclock);
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pcd = get_pcd(fbi, fbi->fb.var.pixclock);
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set_hsync_time(fbi, pcd);
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fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
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set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
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@ -1119,6 +1123,12 @@ static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev)
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memset(fbi, 0, sizeof(struct pxafb_info));
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fbi->dev = dev;
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fbi->clk = clk_get(dev, "LCDCLK");
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if (IS_ERR(fbi->clk)) {
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kfree(fbi);
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return NULL;
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}
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strcpy(fbi->fb.fix.id, PXA_NAME);
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fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
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@ -40,6 +40,7 @@ struct pxafb_dma_descriptor {
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struct pxafb_info {
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struct fb_info fb;
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struct device *dev;
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struct clk *clk;
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/*
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* These are the addresses we mapped
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