ARM: OMAP: Add minimal OMAP2430 support
This patch adds minimal OMAP2430 support to get the kernel booting on 2430SDP. Signed-off-by: Syed Mohammed Khasim <x0khasim@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
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72d0f1c3cd
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@ -11,6 +11,10 @@ config ARCH_OMAP2420
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select OMAP_DM_TIMER
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select ARCH_OMAP_OTG
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config ARCH_OMAP2430
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bool "OMAP2430 support"
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depends on ARCH_OMAP24XX
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comment "OMAP Board Type"
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depends on ARCH_OMAP2
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@ -26,3 +30,8 @@ config MACH_OMAP_H4
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config MACH_OMAP_APOLLON
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bool "OMAP 2420 Apollon board"
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depends on ARCH_OMAP2 && ARCH_OMAP24XX
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config MACH_OMAP_2430SDP
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bool "OMAP 2430 SDP board"
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depends on ARCH_OMAP2 && ARCH_OMAP24XX
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@ -14,5 +14,6 @@ obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o
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# Specific board support
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obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
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obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
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obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o
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obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
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@ -0,0 +1,218 @@
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/*
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* linux/arch/arm/mach-omap2/board-2430sdp.c
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*
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* Copyright (C) 2006 Texas Instruments
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*
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* Modified from mach-omap2/board-generic.c
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*
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* Initial Code : Based on a patch from Komal Shah and Richard Woodruff
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* Updated the Code for 2430 SDP : Syed Mohammed Khasim
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/flash.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/board.h>
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#include <asm/arch/common.h>
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#include <asm/arch/gpmc.h>
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#include "prcm-regs.h"
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#include <asm/io.h>
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#define SDP2430_FLASH_CS 0
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#define SDP2430_SMC91X_CS 5
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static struct mtd_partition sdp2430_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_256K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* file system */
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{
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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}
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};
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static struct flash_platform_data sdp2430_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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.parts = sdp2430_partitions,
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.nr_parts = ARRAY_SIZE(sdp2430_partitions),
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};
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static struct resource sdp2430_flash_resource = {
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.start = SDP2430_CS0_BASE,
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.end = SDP2430_CS0_BASE + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device sdp2430_flash_device = {
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.name = "omapflash",
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.id = 0,
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.dev = {
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.platform_data = &sdp2430_flash_data,
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},
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.num_resources = 1,
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.resource = &sdp2430_flash_resource,
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};
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static struct resource sdp2430_smc91x_resources[] = {
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[0] = {
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.start = SDP2430_CS0_BASE,
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.end = SDP2430_CS0_BASE + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
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.end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sdp2430_smc91x_device = {
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.name = "smc91x",
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.id = -1,
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.num_resources = ARRAY_SIZE(sdp2430_smc91x_resources),
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.resource = sdp2430_smc91x_resources,
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};
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static struct platform_device *sdp2430_devices[] __initdata = {
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&sdp2430_smc91x_device,
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&sdp2430_flash_device,
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};
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static inline void __init sdp2430_init_smc91x(void)
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{
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int eth_cs;
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unsigned long cs_mem_base;
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unsigned int rate;
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struct clk *l3ck;
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eth_cs = SDP2430_SMC91X_CS;
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l3ck = clk_get(NULL, "core_l3_ck");
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if (IS_ERR(l3ck))
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rate = 100000000;
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else
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rate = clk_get_rate(l3ck);
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/* Make sure CS1 timings are correct, for 2430 always muxed */
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
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if (rate >= 160000000) {
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
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} else if (rate >= 130000000) {
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
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} else { /* rate = 100000000 */
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
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gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
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}
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if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
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printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
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return;
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}
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sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300;
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sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
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udelay(100);
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if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) {
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printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
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OMAP24XX_ETHR_GPIO_IRQ);
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gpmc_cs_free(eth_cs);
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return;
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}
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omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1);
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}
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static void __init omap_2430sdp_init_irq(void)
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{
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omap2_init_common_hw();
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omap_init_irq();
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omap_gpio_init();
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sdp2430_init_smc91x();
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}
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static struct omap_uart_config sdp2430_uart_config __initdata = {
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.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
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};
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static struct omap_board_config_kernel sdp2430_config[] = {
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{OMAP_TAG_UART, &sdp2430_uart_config},
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};
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static void __init omap_2430sdp_init(void)
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{
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platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
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omap_board_config = sdp2430_config;
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omap_board_config_size = ARRAY_SIZE(sdp2430_config);
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omap_serial_init();
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}
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static void __init omap_2430sdp_map_io(void)
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{
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omap2_map_common_io();
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}
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MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
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/* Maintainer: Syed Khasim - Texas Instruments Inc */
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.phys_io = 0x48000000,
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.io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
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.boot_params = 0x80000100,
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.map_io = omap_2430sdp_map_io,
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.init_irq = omap_2430sdp_init_irq,
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.init_machine = omap_2430sdp_init,
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.timer = &omap_timer,
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MACHINE_END
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@ -55,8 +55,10 @@ static void omap_init_i2c(void)
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if (machine_is_omap_h4())
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return;
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omap_cfg_reg(J15_24XX_I2C2_SCL);
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omap_cfg_reg(H19_24XX_I2C2_SDA);
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if (!cpu_is_omap2430()) {
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omap_cfg_reg(J15_24XX_I2C2_SCL);
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omap_cfg_reg(H19_24XX_I2C2_SDA);
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}
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(void) platform_device_register(&omap_i2c_device2);
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}
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@ -22,7 +22,14 @@
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#undef DEBUG
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#ifdef CONFIG_ARCH_OMAP2420
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#define GPMC_BASE 0x6800a000
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#endif
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#ifdef CONFIG_ARCH_OMAP2430
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#define GPMC_BASE 0x6E000000
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#endif
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#define GPMC_REVISION 0x00
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#define GPMC_SYSCONFIG 0x10
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#define GPMC_SYSSTATUS 0x14
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@ -17,7 +17,13 @@
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#include <asm/io.h>
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#if defined(CONFIG_ARCH_OMAP2420)
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#define OMAP24XX_TAP_BASE io_p2v(0x48014000)
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#endif
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#if defined(CONFIG_ARCH_OMAP2430)
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#define OMAP24XX_TAP_BASE io_p2v(0x4900A000)
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#endif
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#define OMAP_TAP_IDCODE 0x0204
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#define OMAP_TAP_PROD_ID 0x0208
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@ -5,6 +5,7 @@
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*
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* Copyright (C) 2005 Nokia Corporation
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* Author: Juha Yrjölä <juha.yrjola@nokia.com>
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* Updated map desc to add 2430 support : <x0khasim@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -41,6 +42,20 @@ static struct map_desc omap2_io_desc[] __initdata = {
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.length = L3_24XX_SIZE,
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.type = MT_DEVICE
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},
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#ifdef CONFIG_ARCH_OMAP2430
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{
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.virtual = L4_WK_243X_VIRT,
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.pfn = __phys_to_pfn(L4_WK_243X_PHYS),
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.length = L4_WK_243X_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP243X_GPMC_VIRT,
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.pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
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.length = OMAP243X_GPMC_SIZE,
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.type = MT_DEVICE
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},
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#endif
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{
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.virtual = DSP_MEM_24XX_VIRT,
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.pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
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@ -81,6 +96,11 @@ void __init omap2_init_common_hw(void)
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{
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omap2_mux_init();
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omap2_clk_init();
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/*
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* Need to Fix this for 2430
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*/
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#ifndef CONFIG_ARCH_OMAP2430
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omap2_init_memory();
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#endif
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gpmc_init();
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}
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@ -0,0 +1,44 @@
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/*
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* linux/include/asm-arm/arch-omap/board-2430sdp.h
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*
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* Hardware definitions for TI OMAP2430 SDP board.
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*
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* Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ASM_ARCH_OMAP_2430SDP_H
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#define __ASM_ARCH_OMAP_2430SDP_H
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/* Placeholder for 2430SDP specific defines */
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#define OMAP24XX_ETHR_START 0x08000300
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#define OMAP24XX_ETHR_GPIO_IRQ 149
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#define SDP2430_CS0_BASE 0x04000000
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#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ
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/* TWL4030 Primary Interrupt Handler (PIH) interrupts */
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#define IH_TWL4030_BASE IH_BOARD_BASE
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#define IH_TWL4030_END (IH_TWL4030_BASE+8)
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#define NR_IRQS (IH_TWL4030_END)
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#endif /* __ASM_ARCH_OMAP_2430SDP_H */
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@ -318,6 +318,10 @@
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#include "board-h4.h"
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#endif
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#ifdef CONFIG_MACH_OMAP_2430SDP
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#include "board-2430sdp.h"
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#endif
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#ifdef CONFIG_MACH_OMAP_APOLLON
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#include "board-apollon.h"
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#endif
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@ -72,6 +72,16 @@
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#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */
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#define L4_24XX_VIRT 0xd8000000
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#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
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#ifdef CONFIG_ARCH_OMAP2430
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#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */
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#define L4_WK_243X_VIRT 0xd9000000
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#define L4_WK_243X_SIZE SZ_1M
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#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */
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#define OMAP243X_GPMC_VIRT 0xFE000000
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#define OMAP243X_GPMC_SIZE SZ_1M
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#endif
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#define IO_OFFSET 0x90000000
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#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
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#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
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@ -8,6 +8,7 @@
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*/
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#define L4_24XX_BASE 0x48000000
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#define L4_WK_243X_BASE 0x49000000
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#define L3_24XX_BASE 0x68000000
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/* interrupt controller */
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#define OMAP24XX_IVA_INTC_BASE 0x40000000
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#define IRQ_SIR_IRQ 0x0040
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#ifdef CONFIG_ARCH_OMAP2420
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#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
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#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000)
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#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000)
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#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000)
|
||||
#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000)
|
||||
#define OMAP24XX_SDRC_BASE (0x6D000000)
|
||||
#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8)
|
||||
#define OMAP243X_GPMC_BASE 0x6E000000
|
||||
#endif
|
||||
|
||||
/* DSP SS */
|
||||
#define OMAP24XX_DSP_BASE 0x58000000
|
||||
|
|
Loading…
Reference in New Issue