drm/i915/overlay: Whitespace
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
4fc6ee7646
commit
722506f04d
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@ -291,7 +291,7 @@ extern void intel_setup_overlay(struct drm_device *dev);
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extern void intel_cleanup_overlay(struct drm_device *dev);
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extern int intel_overlay_switch_off(struct intel_overlay *overlay);
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extern int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
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int interruptible);
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bool interruptible);
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extern int intel_overlay_put_image(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern int intel_overlay_attrs(struct drm_device *dev, void *data,
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@ -176,7 +176,6 @@ struct overlay_registers {
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#define OVERLAY_NONPHYSICAL(dev) (IS_G33(dev) || IS_I965G(dev))
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#define OVERLAY_EXISTS(dev) (!IS_G4X(dev) && !IS_IRONLAKE(dev) && !IS_GEN6(dev))
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static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
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{
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drm_i915_private_t *dev_priv = overlay->dev->dev_private;
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@ -235,7 +234,8 @@ static int intel_overlay_on(struct intel_overlay *overlay)
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return -ENOMEM;
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ret = i915_do_wait_request(dev,
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overlay->last_flip_req, 1, &dev_priv->render_ring);
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overlay->last_flip_req, true,
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&dev_priv->render_ring);
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if (ret != 0)
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return ret;
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@ -246,7 +246,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
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/* overlay needs to be enabled in OCMD reg */
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static void intel_overlay_continue(struct intel_overlay *overlay,
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bool load_polyphase_filter)
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bool load_polyphase_filter)
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{
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struct drm_device *dev = overlay->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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@ -275,13 +275,14 @@ static void intel_overlay_continue(struct intel_overlay *overlay,
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static int intel_overlay_wait_flip(struct intel_overlay *overlay)
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{
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struct drm_device *dev = overlay->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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drm_i915_private_t *dev_priv = dev->dev_private;
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int ret;
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u32 tmp;
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if (overlay->last_flip_req != 0) {
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ret = i915_do_wait_request(dev, overlay->last_flip_req,
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1, &dev_priv->render_ring);
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ret = i915_do_wait_request(dev,
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overlay->last_flip_req, true,
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&dev_priv->render_ring);
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if (ret == 0) {
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overlay->last_flip_req = 0;
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@ -296,17 +297,18 @@ static int intel_overlay_wait_flip(struct intel_overlay *overlay)
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overlay->hw_wedged = RELEASE_OLD_VID;
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BEGIN_LP_RING(2);
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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ret = i915_do_wait_request(dev, overlay->last_flip_req,
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1, &dev_priv->render_ring);
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ret = i915_do_wait_request(dev,
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overlay->last_flip_req, true,
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&dev_priv->render_ring);
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if (ret != 0)
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return ret;
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@ -337,28 +339,8 @@ static int intel_overlay_off(struct intel_overlay *overlay)
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BEGIN_LP_RING(4);
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OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
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OUT_RING(flip_addr);
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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ret = i915_do_wait_request(dev, overlay->last_flip_req,
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1, &dev_priv->render_ring);
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if (ret != 0)
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return ret;
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/* turn overlay off */
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overlay->hw_wedged = SWITCH_OFF_STAGE_2;
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BEGIN_LP_RING(4);
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OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
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OUT_RING(flip_addr);
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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@ -366,8 +348,30 @@ static int intel_overlay_off(struct intel_overlay *overlay)
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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ret = i915_do_wait_request(dev, overlay->last_flip_req,
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1, &dev_priv->render_ring);
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ret = i915_do_wait_request(dev,
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overlay->last_flip_req, true,
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&dev_priv->render_ring);
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if (ret != 0)
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return ret;
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/* turn overlay off */
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overlay->hw_wedged = SWITCH_OFF_STAGE_2;
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BEGIN_LP_RING(4);
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OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
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OUT_RING(flip_addr);
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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ret = i915_do_wait_request(dev,
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overlay->last_flip_req, true,
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&dev_priv->render_ring);
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if (ret != 0)
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return ret;
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@ -396,7 +400,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
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/* recover from an interruption due to a signal
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* We have to be careful not to repeat work forever an make forward progess. */
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int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
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int interruptible)
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bool interruptible)
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{
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struct drm_device *dev = overlay->dev;
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struct drm_gem_object *obj;
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@ -415,46 +419,47 @@ int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
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}
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ret = i915_do_wait_request(dev, overlay->last_flip_req,
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interruptible, &dev_priv->render_ring);
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interruptible, &dev_priv->render_ring);
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if (ret != 0)
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return ret;
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switch (overlay->hw_wedged) {
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case RELEASE_OLD_VID:
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obj = &overlay->old_vid_bo->base;
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i915_gem_object_unpin(obj);
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drm_gem_object_unreference(obj);
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overlay->old_vid_bo = NULL;
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break;
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case SWITCH_OFF_STAGE_1:
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flip_addr = overlay->flip_addr;
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flip_addr |= OFC_UPDATE;
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case RELEASE_OLD_VID:
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obj = &overlay->old_vid_bo->base;
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i915_gem_object_unpin(obj);
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drm_gem_object_unreference(obj);
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overlay->old_vid_bo = NULL;
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break;
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case SWITCH_OFF_STAGE_1:
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flip_addr = overlay->flip_addr;
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flip_addr |= OFC_UPDATE;
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overlay->hw_wedged = SWITCH_OFF_STAGE_2;
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overlay->hw_wedged = SWITCH_OFF_STAGE_2;
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BEGIN_LP_RING(4);
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OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
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OUT_RING(flip_addr);
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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BEGIN_LP_RING(4);
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OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
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OUT_RING(flip_addr);
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OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL,
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&dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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overlay->last_flip_req =
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i915_add_request(dev, NULL,
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&dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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ret = i915_do_wait_request(dev, overlay->last_flip_req,
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interruptible, &dev_priv->render_ring);
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if (ret != 0)
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return ret;
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ret = i915_do_wait_request(dev, overlay->last_flip_req,
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interruptible,
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&dev_priv->render_ring);
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if (ret != 0)
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return ret;
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case SWITCH_OFF_STAGE_2:
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intel_overlay_off_tail(overlay);
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break;
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default:
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BUG_ON(overlay->hw_wedged != NEEDS_WAIT_FOR_FLIP);
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case SWITCH_OFF_STAGE_2:
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intel_overlay_off_tail(overlay);
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break;
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default:
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BUG_ON(overlay->hw_wedged != NEEDS_WAIT_FOR_FLIP);
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}
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overlay->hw_wedged = 0;
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@ -507,50 +512,50 @@ struct put_image_params {
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static int packed_depth_bytes(u32 format)
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{
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switch (format & I915_OVERLAY_DEPTH_MASK) {
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case I915_OVERLAY_YUV422:
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return 4;
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case I915_OVERLAY_YUV411:
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/* return 6; not implemented */
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default:
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return -EINVAL;
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case I915_OVERLAY_YUV422:
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return 4;
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case I915_OVERLAY_YUV411:
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/* return 6; not implemented */
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default:
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return -EINVAL;
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}
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}
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static int packed_width_bytes(u32 format, short width)
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{
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switch (format & I915_OVERLAY_DEPTH_MASK) {
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case I915_OVERLAY_YUV422:
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return width << 1;
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default:
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return -EINVAL;
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case I915_OVERLAY_YUV422:
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return width << 1;
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default:
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return -EINVAL;
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}
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}
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static int uv_hsubsampling(u32 format)
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{
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switch (format & I915_OVERLAY_DEPTH_MASK) {
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case I915_OVERLAY_YUV422:
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case I915_OVERLAY_YUV420:
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return 2;
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case I915_OVERLAY_YUV411:
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case I915_OVERLAY_YUV410:
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return 4;
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default:
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return -EINVAL;
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case I915_OVERLAY_YUV422:
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case I915_OVERLAY_YUV420:
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return 2;
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case I915_OVERLAY_YUV411:
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case I915_OVERLAY_YUV410:
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return 4;
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default:
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return -EINVAL;
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}
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}
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static int uv_vsubsampling(u32 format)
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{
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switch (format & I915_OVERLAY_DEPTH_MASK) {
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case I915_OVERLAY_YUV420:
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case I915_OVERLAY_YUV410:
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return 2;
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case I915_OVERLAY_YUV422:
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case I915_OVERLAY_YUV411:
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return 1;
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default:
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return -EINVAL;
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case I915_OVERLAY_YUV420:
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case I915_OVERLAY_YUV410:
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return 2;
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case I915_OVERLAY_YUV422:
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case I915_OVERLAY_YUV411:
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return 1;
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default:
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return -EINVAL;
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}
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}
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@ -588,7 +593,9 @@ static const u16 y_static_hcoeffs[N_HORIZ_Y_TAPS * N_PHASES] = {
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0x3020, 0xb340, 0x1fb8, 0x34a0, 0xb060,
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0x3020, 0xb240, 0x1fe0, 0x32e0, 0xb040,
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0x3020, 0xb140, 0x1ff8, 0x3160, 0xb020,
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0xb000, 0x3000, 0x0800, 0x3000, 0xb000};
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0xb000, 0x3000, 0x0800, 0x3000, 0xb000
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};
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static const u16 uv_static_hcoeffs[N_HORIZ_UV_TAPS * N_PHASES] = {
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0x3000, 0x1800, 0x1800, 0xb000, 0x18d0, 0x2e60,
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0xb000, 0x1990, 0x2ce0, 0xb020, 0x1a68, 0x2b40,
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@ -598,7 +605,8 @@ static const u16 uv_static_hcoeffs[N_HORIZ_UV_TAPS * N_PHASES] = {
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0xb100, 0x1eb8, 0x3620, 0xb100, 0x1f18, 0x34a0,
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0xb100, 0x1f68, 0x3360, 0xb0e0, 0x1fa8, 0x3240,
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0xb0c0, 0x1fe0, 0x3140, 0xb060, 0x1ff0, 0x30a0,
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0x3000, 0x0800, 0x3000};
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0x3000, 0x0800, 0x3000
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};
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static void update_polyphase_filter(struct overlay_registers *regs)
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{
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@ -631,29 +639,31 @@ static bool update_scaling_factors(struct intel_overlay *overlay,
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yscale = 1 << FP_SHIFT;
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/*if (params->format & I915_OVERLAY_YUV_PLANAR) {*/
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xscale_UV = xscale/uv_hscale;
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yscale_UV = yscale/uv_vscale;
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/* make the Y scale to UV scale ratio an exact multiply */
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xscale = xscale_UV * uv_hscale;
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yscale = yscale_UV * uv_vscale;
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xscale_UV = xscale/uv_hscale;
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yscale_UV = yscale/uv_vscale;
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/* make the Y scale to UV scale ratio an exact multiply */
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xscale = xscale_UV * uv_hscale;
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yscale = yscale_UV * uv_vscale;
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/*} else {
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xscale_UV = 0;
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yscale_UV = 0;
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}*/
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xscale_UV = 0;
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yscale_UV = 0;
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}*/
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if (xscale != overlay->old_xscale || yscale != overlay->old_yscale)
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scale_changed = true;
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overlay->old_xscale = xscale;
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overlay->old_yscale = yscale;
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regs->YRGBSCALE = ((yscale & FRACT_MASK) << 20)
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| ((xscale >> FP_SHIFT) << 16)
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| ((xscale & FRACT_MASK) << 3);
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regs->UVSCALE = ((yscale_UV & FRACT_MASK) << 20)
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| ((xscale_UV >> FP_SHIFT) << 16)
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| ((xscale_UV & FRACT_MASK) << 3);
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regs->UVSCALEV = ((yscale >> FP_SHIFT) << 16)
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| ((yscale_UV >> FP_SHIFT) << 0);
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regs->YRGBSCALE = (((yscale & FRACT_MASK) << 20) |
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((xscale >> FP_SHIFT) << 16) |
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((xscale & FRACT_MASK) << 3));
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regs->UVSCALE = (((yscale_UV & FRACT_MASK) << 20) |
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((xscale_UV >> FP_SHIFT) << 16) |
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((xscale_UV & FRACT_MASK) << 3));
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regs->UVSCALEV = ((((yscale >> FP_SHIFT) << 16) |
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((yscale_UV >> FP_SHIFT) << 0)));
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if (scale_changed)
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update_polyphase_filter(regs);
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@ -666,21 +676,21 @@ static void update_colorkey(struct intel_overlay *overlay,
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{
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u32 key = overlay->color_key;
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switch (overlay->crtc->base.fb->bits_per_pixel) {
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case 8:
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regs->DCLRKV = 0;
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regs->DCLRKM = CLK_RGB8I_MASK | DST_KEY_ENABLE;
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case 16:
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if (overlay->crtc->base.fb->depth == 15) {
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regs->DCLRKV = RGB15_TO_COLORKEY(key);
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regs->DCLRKM = CLK_RGB15_MASK | DST_KEY_ENABLE;
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} else {
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regs->DCLRKV = RGB16_TO_COLORKEY(key);
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regs->DCLRKM = CLK_RGB16_MASK | DST_KEY_ENABLE;
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}
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case 24:
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case 32:
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regs->DCLRKV = key;
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regs->DCLRKM = CLK_RGB24_MASK | DST_KEY_ENABLE;
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case 8:
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regs->DCLRKV = 0;
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regs->DCLRKM = CLK_RGB8I_MASK | DST_KEY_ENABLE;
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case 16:
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if (overlay->crtc->base.fb->depth == 15) {
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regs->DCLRKV = RGB15_TO_COLORKEY(key);
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regs->DCLRKM = CLK_RGB15_MASK | DST_KEY_ENABLE;
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} else {
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regs->DCLRKV = RGB16_TO_COLORKEY(key);
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regs->DCLRKM = CLK_RGB16_MASK | DST_KEY_ENABLE;
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}
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case 24:
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case 32:
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regs->DCLRKV = key;
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regs->DCLRKM = CLK_RGB24_MASK | DST_KEY_ENABLE;
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}
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}
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@ -690,39 +700,39 @@ static u32 overlay_cmd_reg(struct put_image_params *params)
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if (params->format & I915_OVERLAY_YUV_PLANAR) {
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switch (params->format & I915_OVERLAY_DEPTH_MASK) {
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case I915_OVERLAY_YUV422:
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cmd |= OCMD_YUV_422_PLANAR;
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break;
|
||||
case I915_OVERLAY_YUV420:
|
||||
cmd |= OCMD_YUV_420_PLANAR;
|
||||
break;
|
||||
case I915_OVERLAY_YUV411:
|
||||
case I915_OVERLAY_YUV410:
|
||||
cmd |= OCMD_YUV_410_PLANAR;
|
||||
break;
|
||||
case I915_OVERLAY_YUV422:
|
||||
cmd |= OCMD_YUV_422_PLANAR;
|
||||
break;
|
||||
case I915_OVERLAY_YUV420:
|
||||
cmd |= OCMD_YUV_420_PLANAR;
|
||||
break;
|
||||
case I915_OVERLAY_YUV411:
|
||||
case I915_OVERLAY_YUV410:
|
||||
cmd |= OCMD_YUV_410_PLANAR;
|
||||
break;
|
||||
}
|
||||
} else { /* YUV packed */
|
||||
switch (params->format & I915_OVERLAY_DEPTH_MASK) {
|
||||
case I915_OVERLAY_YUV422:
|
||||
cmd |= OCMD_YUV_422_PACKED;
|
||||
break;
|
||||
case I915_OVERLAY_YUV411:
|
||||
cmd |= OCMD_YUV_411_PACKED;
|
||||
break;
|
||||
case I915_OVERLAY_YUV422:
|
||||
cmd |= OCMD_YUV_422_PACKED;
|
||||
break;
|
||||
case I915_OVERLAY_YUV411:
|
||||
cmd |= OCMD_YUV_411_PACKED;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (params->format & I915_OVERLAY_SWAP_MASK) {
|
||||
case I915_OVERLAY_NO_SWAP:
|
||||
break;
|
||||
case I915_OVERLAY_UV_SWAP:
|
||||
cmd |= OCMD_UV_SWAP;
|
||||
break;
|
||||
case I915_OVERLAY_Y_SWAP:
|
||||
cmd |= OCMD_Y_SWAP;
|
||||
break;
|
||||
case I915_OVERLAY_Y_AND_UV_SWAP:
|
||||
cmd |= OCMD_Y_AND_UV_SWAP;
|
||||
break;
|
||||
case I915_OVERLAY_NO_SWAP:
|
||||
break;
|
||||
case I915_OVERLAY_UV_SWAP:
|
||||
cmd |= OCMD_UV_SWAP;
|
||||
break;
|
||||
case I915_OVERLAY_Y_SWAP:
|
||||
cmd |= OCMD_Y_SWAP;
|
||||
break;
|
||||
case I915_OVERLAY_Y_AND_UV_SWAP:
|
||||
cmd |= OCMD_Y_AND_UV_SWAP;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -789,7 +799,7 @@ int intel_overlay_do_put_image(struct intel_overlay *overlay,
|
|||
|
||||
regs->SWIDTH = params->src_w;
|
||||
regs->SWIDTHSW = calc_swidthsw(overlay->dev,
|
||||
params->offset_Y, tmp_width);
|
||||
params->offset_Y, tmp_width);
|
||||
regs->SHEIGHT = params->src_h;
|
||||
regs->OBUF_0Y = bo_priv->gtt_offset + params-> offset_Y;
|
||||
regs->OSTRIDE = params->stride_Y;
|
||||
|
@ -800,9 +810,9 @@ int intel_overlay_do_put_image(struct intel_overlay *overlay,
|
|||
u32 tmp_U, tmp_V;
|
||||
regs->SWIDTH |= (params->src_w/uv_hscale) << 16;
|
||||
tmp_U = calc_swidthsw(overlay->dev, params->offset_U,
|
||||
params->src_w/uv_hscale);
|
||||
params->src_w/uv_hscale);
|
||||
tmp_V = calc_swidthsw(overlay->dev, params->offset_V,
|
||||
params->src_w/uv_hscale);
|
||||
params->src_w/uv_hscale);
|
||||
regs->SWIDTHSW |= max_t(u32, tmp_U, tmp_V) << 16;
|
||||
regs->SHEIGHT |= (params->src_h/uv_vscale) << 16;
|
||||
regs->OBUF_0U = bo_priv->gtt_offset + params->offset_U;
|
||||
|
@ -868,7 +878,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
|
|||
static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
|
||||
struct intel_crtc *crtc)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = overlay->dev->dev_private;
|
||||
drm_i915_private_t *dev_priv = overlay->dev->dev_private;
|
||||
u32 pipeconf;
|
||||
int pipeconf_reg = (crtc->pipe == 0) ? PIPEACONF : PIPEBCONF;
|
||||
|
||||
|
@ -887,7 +897,7 @@ static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
|
|||
static void update_pfit_vscale_ratio(struct intel_overlay *overlay)
|
||||
{
|
||||
struct drm_device *dev = overlay->dev;
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
u32 ratio;
|
||||
u32 pfit_control = I915_READ(PFIT_CONTROL);
|
||||
|
||||
|
@ -911,12 +921,10 @@ static int check_overlay_dst(struct intel_overlay *overlay,
|
|||
{
|
||||
struct drm_display_mode *mode = &overlay->crtc->base.mode;
|
||||
|
||||
if ((rec->dst_x < mode->crtc_hdisplay)
|
||||
&& (rec->dst_x + rec->dst_width
|
||||
<= mode->crtc_hdisplay)
|
||||
&& (rec->dst_y < mode->crtc_vdisplay)
|
||||
&& (rec->dst_y + rec->dst_height
|
||||
<= mode->crtc_vdisplay))
|
||||
if (rec->dst_x < mode->crtc_hdisplay &&
|
||||
rec->dst_x + rec->dst_width <= mode->crtc_hdisplay &&
|
||||
rec->dst_y < mode->crtc_vdisplay &&
|
||||
rec->dst_y + rec->dst_height <= mode->crtc_vdisplay)
|
||||
return 0;
|
||||
else
|
||||
return -EINVAL;
|
||||
|
@ -949,45 +957,45 @@ static int check_overlay_src(struct drm_device *dev,
|
|||
|
||||
/* check src dimensions */
|
||||
if (IS_845G(dev) || IS_I830(dev)) {
|
||||
if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY
|
||||
|| rec->src_width > IMAGE_MAX_WIDTH_LEGACY)
|
||||
if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY ||
|
||||
rec->src_width > IMAGE_MAX_WIDTH_LEGACY)
|
||||
return -EINVAL;
|
||||
} else {
|
||||
if (rec->src_height > IMAGE_MAX_HEIGHT
|
||||
|| rec->src_width > IMAGE_MAX_WIDTH)
|
||||
if (rec->src_height > IMAGE_MAX_HEIGHT ||
|
||||
rec->src_width > IMAGE_MAX_WIDTH)
|
||||
return -EINVAL;
|
||||
}
|
||||
/* better safe than sorry, use 4 as the maximal subsampling ratio */
|
||||
if (rec->src_height < N_VERT_Y_TAPS*4
|
||||
|| rec->src_width < N_HORIZ_Y_TAPS*4)
|
||||
if (rec->src_height < N_VERT_Y_TAPS*4 ||
|
||||
rec->src_width < N_HORIZ_Y_TAPS*4)
|
||||
return -EINVAL;
|
||||
|
||||
/* check alignment constraints */
|
||||
switch (rec->flags & I915_OVERLAY_TYPE_MASK) {
|
||||
case I915_OVERLAY_RGB:
|
||||
/* not implemented */
|
||||
case I915_OVERLAY_RGB:
|
||||
/* not implemented */
|
||||
return -EINVAL;
|
||||
case I915_OVERLAY_YUV_PACKED:
|
||||
depth = packed_depth_bytes(rec->flags);
|
||||
if (uv_vscale != 1)
|
||||
return -EINVAL;
|
||||
case I915_OVERLAY_YUV_PACKED:
|
||||
depth = packed_depth_bytes(rec->flags);
|
||||
if (uv_vscale != 1)
|
||||
return -EINVAL;
|
||||
if (depth < 0)
|
||||
return depth;
|
||||
/* ignore UV planes */
|
||||
rec->stride_UV = 0;
|
||||
rec->offset_U = 0;
|
||||
rec->offset_V = 0;
|
||||
/* check pixel alignment */
|
||||
if (rec->offset_Y % depth)
|
||||
return -EINVAL;
|
||||
break;
|
||||
case I915_OVERLAY_YUV_PLANAR:
|
||||
if (uv_vscale < 0 || uv_hscale < 0)
|
||||
return -EINVAL;
|
||||
/* no offset restrictions for planar formats */
|
||||
break;
|
||||
default:
|
||||
if (depth < 0)
|
||||
return depth;
|
||||
/* ignore UV planes */
|
||||
rec->stride_UV = 0;
|
||||
rec->offset_U = 0;
|
||||
rec->offset_V = 0;
|
||||
/* check pixel alignment */
|
||||
if (rec->offset_Y % depth)
|
||||
return -EINVAL;
|
||||
break;
|
||||
case I915_OVERLAY_YUV_PLANAR:
|
||||
if (uv_vscale < 0 || uv_hscale < 0)
|
||||
return -EINVAL;
|
||||
/* no offset restrictions for planar formats */
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (rec->src_width % uv_hscale)
|
||||
|
@ -1011,32 +1019,32 @@ static int check_overlay_src(struct drm_device *dev,
|
|||
|
||||
/* check buffer dimensions */
|
||||
switch (rec->flags & I915_OVERLAY_TYPE_MASK) {
|
||||
case I915_OVERLAY_RGB:
|
||||
case I915_OVERLAY_YUV_PACKED:
|
||||
/* always 4 Y values per depth pixels */
|
||||
if (packed_width_bytes(rec->flags, rec->src_width)
|
||||
> rec->stride_Y)
|
||||
return -EINVAL;
|
||||
case I915_OVERLAY_RGB:
|
||||
case I915_OVERLAY_YUV_PACKED:
|
||||
/* always 4 Y values per depth pixels */
|
||||
if (packed_width_bytes(rec->flags, rec->src_width) > rec->stride_Y)
|
||||
return -EINVAL;
|
||||
|
||||
tmp = rec->stride_Y*rec->src_height;
|
||||
if (rec->offset_Y + tmp > new_bo->size)
|
||||
return -EINVAL;
|
||||
break;
|
||||
case I915_OVERLAY_YUV_PLANAR:
|
||||
if (rec->src_width > rec->stride_Y)
|
||||
return -EINVAL;
|
||||
if (rec->src_width/uv_hscale > rec->stride_UV)
|
||||
return -EINVAL;
|
||||
tmp = rec->stride_Y*rec->src_height;
|
||||
if (rec->offset_Y + tmp > new_bo->size)
|
||||
return -EINVAL;
|
||||
break;
|
||||
|
||||
tmp = rec->stride_Y*rec->src_height;
|
||||
if (rec->offset_Y + tmp > new_bo->size)
|
||||
return -EINVAL;
|
||||
tmp = rec->stride_UV*rec->src_height;
|
||||
tmp /= uv_vscale;
|
||||
if (rec->offset_U + tmp > new_bo->size
|
||||
|| rec->offset_V + tmp > new_bo->size)
|
||||
return -EINVAL;
|
||||
break;
|
||||
case I915_OVERLAY_YUV_PLANAR:
|
||||
if (rec->src_width > rec->stride_Y)
|
||||
return -EINVAL;
|
||||
if (rec->src_width/uv_hscale > rec->stride_UV)
|
||||
return -EINVAL;
|
||||
|
||||
tmp = rec->stride_Y*rec->src_height;
|
||||
if (rec->offset_Y + tmp > new_bo->size)
|
||||
return -EINVAL;
|
||||
tmp = rec->stride_UV*rec->src_height;
|
||||
tmp /= uv_vscale;
|
||||
if (rec->offset_U + tmp > new_bo->size ||
|
||||
rec->offset_V + tmp > new_bo->size)
|
||||
return -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -1082,7 +1090,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
|
|||
return -ENOMEM;
|
||||
|
||||
drmmode_obj = drm_mode_object_find(dev, put_image_rec->crtc_id,
|
||||
DRM_MODE_OBJECT_CRTC);
|
||||
DRM_MODE_OBJECT_CRTC);
|
||||
if (!drmmode_obj) {
|
||||
ret = -ENOENT;
|
||||
goto out_free;
|
||||
|
@ -1090,7 +1098,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
|
|||
crtc = to_intel_crtc(obj_to_crtc(drmmode_obj));
|
||||
|
||||
new_bo = drm_gem_object_lookup(dev, file_priv,
|
||||
put_image_rec->bo_handle);
|
||||
put_image_rec->bo_handle);
|
||||
if (!new_bo) {
|
||||
ret = -ENOENT;
|
||||
goto out_free;
|
||||
|
@ -1133,10 +1141,10 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
|
|||
|
||||
if (overlay->pfit_active) {
|
||||
params->dst_y = ((((u32)put_image_rec->dst_y) << 12) /
|
||||
overlay->pfit_vscale_ratio);
|
||||
overlay->pfit_vscale_ratio);
|
||||
/* shifting right rounds downwards, so add 1 */
|
||||
params->dst_h = ((((u32)put_image_rec->dst_height) << 12) /
|
||||
overlay->pfit_vscale_ratio) + 1;
|
||||
overlay->pfit_vscale_ratio) + 1;
|
||||
} else {
|
||||
params->dst_y = put_image_rec->dst_y;
|
||||
params->dst_h = put_image_rec->dst_height;
|
||||
|
@ -1148,8 +1156,8 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
|
|||
params->src_h = put_image_rec->src_height;
|
||||
params->src_scan_w = put_image_rec->src_scan_width;
|
||||
params->src_scan_h = put_image_rec->src_scan_height;
|
||||
if (params->src_scan_h > params->src_h
|
||||
|| params->src_scan_w > params->src_w) {
|
||||
if (params->src_scan_h > params->src_h ||
|
||||
params->src_scan_w > params->src_w) {
|
||||
ret = -EINVAL;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
@ -1205,7 +1213,7 @@ static bool check_gamma_bounds(u32 gamma1, u32 gamma2)
|
|||
return false;
|
||||
|
||||
for (i = 0; i < 3; i++) {
|
||||
if (((gamma1 >> i * 8) & 0xff) >= ((gamma2 >> i*8) & 0xff))
|
||||
if (((gamma1 >> i*8) & 0xff) >= ((gamma2 >> i*8) & 0xff))
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -1226,16 +1234,18 @@ static bool check_gamma5_errata(u32 gamma5)
|
|||
|
||||
static int check_gamma(struct drm_intel_overlay_attrs *attrs)
|
||||
{
|
||||
if (!check_gamma_bounds(0, attrs->gamma0)
|
||||
|| !check_gamma_bounds(attrs->gamma0, attrs->gamma1)
|
||||
|| !check_gamma_bounds(attrs->gamma1, attrs->gamma2)
|
||||
|| !check_gamma_bounds(attrs->gamma2, attrs->gamma3)
|
||||
|| !check_gamma_bounds(attrs->gamma3, attrs->gamma4)
|
||||
|| !check_gamma_bounds(attrs->gamma4, attrs->gamma5)
|
||||
|| !check_gamma_bounds(attrs->gamma5, 0x00ffffff))
|
||||
if (!check_gamma_bounds(0, attrs->gamma0) ||
|
||||
!check_gamma_bounds(attrs->gamma0, attrs->gamma1) ||
|
||||
!check_gamma_bounds(attrs->gamma1, attrs->gamma2) ||
|
||||
!check_gamma_bounds(attrs->gamma2, attrs->gamma3) ||
|
||||
!check_gamma_bounds(attrs->gamma3, attrs->gamma4) ||
|
||||
!check_gamma_bounds(attrs->gamma4, attrs->gamma5) ||
|
||||
!check_gamma_bounds(attrs->gamma5, 0x00ffffff))
|
||||
return -EINVAL;
|
||||
|
||||
if (!check_gamma5_errata(attrs->gamma5))
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1285,12 +1295,14 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
|
|||
ret = -EINVAL;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
if (attrs->contrast <= 255) {
|
||||
overlay->contrast = attrs->contrast;
|
||||
} else {
|
||||
ret = -EINVAL;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
if (attrs->saturation <= 1023) {
|
||||
overlay->saturation = attrs->saturation;
|
||||
} else {
|
||||
|
@ -1409,7 +1421,7 @@ out_free:
|
|||
|
||||
void intel_cleanup_overlay(struct drm_device *dev)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
|
||||
if (dev_priv->overlay) {
|
||||
/* The bo's should be free'd by the generic code already.
|
||||
|
|
Loading…
Reference in New Issue