Renesas ARM DT updates for v5.8
- USB, UART, PWM, and PCIe support for R-Car M3-W+, - PWM (16-bit Timer Pulse Unit and PWM Timers) support for R-Car M2-W, - Minor fixes and cleanups. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXqqHDQAKCRCKwlD9ZEnx cOAWAP0Vmb2PNTBL8lT1eD+iji5lIEH2Dp4PaB2xOVP3BQsU+gEAlc169Jq/fXKo F+T6hE2D0ExJMkp0DiDfttpKyQsb5wA= =Y+Go -----END PGP SIGNATURE----- Merge tag 'renesas-arm-dt-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.8 - USB, UART, PWM, and PCIe support for R-Car M3-W+, - PWM (16-bit Timer Pulse Unit and PWM Timers) support for R-Car M2-W, - Minor fixes and cleanups. * tag 'renesas-arm-dt-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Fix IOMMU device node names ARM: dts: renesas: Fix IOMMU device node names ARM: dts: shmobile: Update CMT1 compatible values ARM: dts: r8a7791: Add PWM device nodes ARM: dts: r8a7791: Add TPU device node arm64: dts: renesas: r8a77961: Add PCIe device nodes arm64: dts: renesas: r8a77961: Add PWM device nodes arm64: dts: renesas: r8a77961: Add SCIF and HSCIF nodes arm64: dts: renesas: r8a77961: Add USB3.0 device nodes arm64: dts: renesas: r8a77961: Add USB2.0 device nodes Link: https://lore.kernel.org/r/20200430084849.1457-3-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
71dbe9524d
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@ -83,7 +83,7 @@
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};
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cmt1: timer@e6138000 {
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compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
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compatible = "renesas,r8a7740-cmt1";
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reg = <0xe6138000 0x170>;
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interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7740_CLK_CMT1>;
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|
|
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|||
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@ -338,7 +338,7 @@
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#thermal-sensor-cells = <0>;
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};
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ipmmu_sy0: mmu@e6280000 {
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6280000 0 0x1000>;
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@ -348,7 +348,7 @@
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status = "disabled";
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};
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ipmmu_sy1: mmu@e6290000 {
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ipmmu_sy1: iommu@e6290000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6290000 0 0x1000>;
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@ -357,7 +357,7 @@
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status = "disabled";
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};
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ipmmu_ds: mmu@e6740000 {
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ipmmu_ds: iommu@e6740000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6740000 0 0x1000>;
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@ -367,7 +367,7 @@
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status = "disabled";
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};
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ipmmu_mp: mmu@ec680000 {
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ipmmu_mp: iommu@ec680000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xec680000 0 0x1000>;
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@ -376,7 +376,7 @@
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status = "disabled";
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};
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ipmmu_mx: mmu@fe951000 {
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ipmmu_mx: iommu@fe951000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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@ -386,7 +386,7 @@
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status = "disabled";
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};
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ipmmu_gp: mmu@e62a0000 {
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ipmmu_gp: iommu@e62a0000 {
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compatible = "renesas,ipmmu-r8a7743",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe62a0000 0 0x1000>;
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@ -338,7 +338,7 @@
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#thermal-sensor-cells = <0>;
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};
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ipmmu_sy0: mmu@e6280000 {
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7744",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6280000 0 0x1000>;
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@ -348,7 +348,7 @@
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status = "disabled";
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};
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ipmmu_sy1: mmu@e6290000 {
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ipmmu_sy1: iommu@e6290000 {
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compatible = "renesas,ipmmu-r8a7744",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6290000 0 0x1000>;
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@ -357,7 +357,7 @@
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status = "disabled";
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};
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ipmmu_ds: mmu@e6740000 {
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ipmmu_ds: iommu@e6740000 {
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compatible = "renesas,ipmmu-r8a7744",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6740000 0 0x1000>;
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@ -367,7 +367,7 @@
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status = "disabled";
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};
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ipmmu_mp: mmu@ec680000 {
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ipmmu_mp: iommu@ec680000 {
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compatible = "renesas,ipmmu-r8a7744",
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"renesas,ipmmu-vmsa";
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reg = <0 0xec680000 0 0x1000>;
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@ -376,7 +376,7 @@
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status = "disabled";
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};
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ipmmu_mx: mmu@fe951000 {
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ipmmu_mx: iommu@fe951000 {
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compatible = "renesas,ipmmu-r8a7744",
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"renesas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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@ -386,7 +386,7 @@
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status = "disabled";
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};
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ipmmu_gp: mmu@e62a0000 {
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ipmmu_gp: iommu@e62a0000 {
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compatible = "renesas,ipmmu-r8a7744",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe62a0000 0 0x1000>;
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@ -302,7 +302,7 @@
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resets = <&cpg 407>;
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};
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ipmmu_sy0: mmu@e6280000 {
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7745",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6280000 0 0x1000>;
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@ -312,7 +312,7 @@
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status = "disabled";
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};
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ipmmu_sy1: mmu@e6290000 {
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ipmmu_sy1: iommu@e6290000 {
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compatible = "renesas,ipmmu-r8a7745",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6290000 0 0x1000>;
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@ -321,7 +321,7 @@
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status = "disabled";
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};
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ipmmu_ds: mmu@e6740000 {
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ipmmu_ds: iommu@e6740000 {
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compatible = "renesas,ipmmu-r8a7745",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6740000 0 0x1000>;
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@ -331,7 +331,7 @@
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status = "disabled";
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};
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ipmmu_mp: mmu@ec680000 {
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ipmmu_mp: iommu@ec680000 {
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compatible = "renesas,ipmmu-r8a7745",
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"renesas,ipmmu-vmsa";
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reg = <0 0xec680000 0 0x1000>;
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@ -340,7 +340,7 @@
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status = "disabled";
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};
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ipmmu_mx: mmu@fe951000 {
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ipmmu_mx: iommu@fe951000 {
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compatible = "renesas,ipmmu-r8a7745",
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"renesas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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@ -350,7 +350,7 @@
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status = "disabled";
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};
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ipmmu_gp: mmu@e62a0000 {
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ipmmu_gp: iommu@e62a0000 {
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compatible = "renesas,ipmmu-r8a7745",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe62a0000 0 0x1000>;
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|
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|||
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@ -427,7 +427,7 @@
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#thermal-sensor-cells = <0>;
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};
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ipmmu_sy0: mmu@e6280000 {
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7790",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6280000 0 0x1000>;
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@ -437,7 +437,7 @@
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status = "disabled";
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||||
};
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ipmmu_sy1: mmu@e6290000 {
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ipmmu_sy1: iommu@e6290000 {
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compatible = "renesas,ipmmu-r8a7790",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6290000 0 0x1000>;
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@ -446,7 +446,7 @@
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status = "disabled";
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};
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ipmmu_ds: mmu@e6740000 {
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ipmmu_ds: iommu@e6740000 {
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compatible = "renesas,ipmmu-r8a7790",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6740000 0 0x1000>;
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@ -456,7 +456,7 @@
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status = "disabled";
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};
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ipmmu_mp: mmu@ec680000 {
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ipmmu_mp: iommu@ec680000 {
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compatible = "renesas,ipmmu-r8a7790",
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"renesas,ipmmu-vmsa";
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reg = <0 0xec680000 0 0x1000>;
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@ -465,7 +465,7 @@
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status = "disabled";
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};
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ipmmu_mx: mmu@fe951000 {
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ipmmu_mx: iommu@fe951000 {
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compatible = "renesas,ipmmu-r8a7790",
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"renesas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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@ -475,7 +475,7 @@
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status = "disabled";
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};
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ipmmu_rt: mmu@ffc80000 {
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ipmmu_rt: iommu@ffc80000 {
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compatible = "renesas,ipmmu-r8a7790",
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"renesas,ipmmu-vmsa";
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reg = <0 0xffc80000 0 0x1000>;
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@ -291,6 +291,17 @@
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reg = <0 0xe6060000 0 0x250>;
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};
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tpu: pwm@e60f0000 {
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compatible = "renesas,tpu-r8a7791", "renesas,tpu";
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reg = <0 0xe60f0000 0 0x148>;
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interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 304>;
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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resets = <&cpg 304>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a7791-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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@ -350,7 +361,7 @@
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#thermal-sensor-cells = <0>;
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};
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ipmmu_sy0: mmu@e6280000 {
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ipmmu_sy0: iommu@e6280000 {
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compatible = "renesas,ipmmu-r8a7791",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6280000 0 0x1000>;
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|
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@ -360,7 +371,7 @@
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status = "disabled";
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};
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ipmmu_sy1: mmu@e6290000 {
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ipmmu_sy1: iommu@e6290000 {
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compatible = "renesas,ipmmu-r8a7791",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6290000 0 0x1000>;
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@ -369,7 +380,7 @@
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status = "disabled";
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};
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ipmmu_ds: mmu@e6740000 {
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ipmmu_ds: iommu@e6740000 {
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compatible = "renesas,ipmmu-r8a7791",
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"renesas,ipmmu-vmsa";
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reg = <0 0xe6740000 0 0x1000>;
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@ -379,7 +390,7 @@
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status = "disabled";
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};
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ipmmu_mp: mmu@ec680000 {
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ipmmu_mp: iommu@ec680000 {
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compatible = "renesas,ipmmu-r8a7791",
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"renesas,ipmmu-vmsa";
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reg = <0 0xec680000 0 0x1000>;
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|
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@ -388,7 +399,7 @@
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status = "disabled";
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};
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ipmmu_mx: mmu@fe951000 {
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ipmmu_mx: iommu@fe951000 {
|
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compatible = "renesas,ipmmu-r8a7791",
|
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"renesas,ipmmu-vmsa";
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reg = <0 0xfe951000 0 0x1000>;
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|
|
@ -398,7 +409,7 @@
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status = "disabled";
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||||
};
|
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ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
|
@ -407,7 +418,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7791",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
@ -1067,6 +1078,76 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm0: pwm@e6e30000 {
|
||||
compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e30000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm1: pwm@e6e31000 {
|
||||
compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e31000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm2: pwm@e6e32000 {
|
||||
compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e32000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm3: pwm@e6e33000 {
|
||||
compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e33000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm4: pwm@e6e34000 {
|
||||
compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e34000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm5: pwm@e6e35000 {
|
||||
compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e35000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm6: pwm@e6e36000 {
|
||||
compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e36000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc: adc@e6e54000 {
|
||||
compatible = "renesas,r8a7791-gyroadc",
|
||||
"renesas,rcar-gyroadc";
|
||||
|
|
|
|||
|
|
@ -336,7 +336,7 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -346,7 +346,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -355,7 +355,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -365,7 +365,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -374,7 +374,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -384,7 +384,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
|
|
@ -393,7 +393,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7793",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -290,7 +290,7 @@
|
|||
resets = <&cpg 407>;
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
ipmmu_sy0: iommu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
|
|
@ -300,7 +300,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
ipmmu_sy1: iommu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
|
|
@ -309,7 +309,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
ipmmu_ds: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
|
|
@ -319,7 +319,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
ipmmu_mp: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
|
|
@ -328,7 +328,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
ipmmu_mx: iommu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
|
|
@ -338,7 +338,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_gp: mmu@e62a0000 {
|
||||
ipmmu_gp: iommu@e62a0000 {
|
||||
compatible = "renesas,ipmmu-r8a7794",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe62a0000 0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@
|
|||
};
|
||||
|
||||
cmt1: timer@e6138000 {
|
||||
compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48";
|
||||
compatible = "renesas,sh73a0-cmt1";
|
||||
reg = <0xe6138000 0x200>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks SH73A0_CLK_CMT1>;
|
||||
|
|
|
|||
|
|
@ -1000,7 +1000,7 @@
|
|||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -1008,7 +1008,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -1016,7 +1016,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -1024,7 +1024,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -1033,7 +1033,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec670000 {
|
||||
ipmmu_mp: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -1041,7 +1041,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 5>;
|
||||
|
|
@ -1049,7 +1049,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv1: mmu@fd950000 {
|
||||
ipmmu_pv1: iommu@fd950000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xfd950000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -1057,7 +1057,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 8>;
|
||||
|
|
@ -1065,7 +1065,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a774a1";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 9>;
|
||||
|
|
|
|||
|
|
@ -874,7 +874,7 @@
|
|||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -882,7 +882,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -890,7 +890,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -898,7 +898,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -907,7 +907,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec670000 {
|
||||
ipmmu_mp: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -915,7 +915,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -923,7 +923,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||
|
|
@ -931,7 +931,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 14>;
|
||||
|
|
@ -939,7 +939,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vp0: mmu@fe990000 {
|
||||
ipmmu_vp0: iommu@fe990000 {
|
||||
compatible = "renesas,ipmmu-r8a774b1";
|
||||
reg = <0 0xfe990000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 16>;
|
||||
|
|
|
|||
|
|
@ -847,7 +847,7 @@
|
|||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -855,7 +855,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -863,7 +863,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -871,7 +871,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -880,7 +880,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec670000 {
|
||||
ipmmu_mp: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -888,7 +888,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -896,7 +896,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||
|
|
@ -904,7 +904,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 14>;
|
||||
|
|
@ -912,7 +912,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vp0: mmu@fe990000 {
|
||||
ipmmu_vp0: iommu@fe990000 {
|
||||
compatible = "renesas,ipmmu-r8a774c0";
|
||||
reg = <0 0xfe990000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 16>;
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@
|
|||
/delete-node/ dma-controller@e6460000;
|
||||
/delete-node/ dma-controller@e6470000;
|
||||
|
||||
ipmmu_mp1: mmu@ec680000 {
|
||||
ipmmu_mp1: iommu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 5>;
|
||||
|
|
@ -85,7 +85,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_sy: mmu@e7730000 {
|
||||
ipmmu_sy: iommu@e7730000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xe7730000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 8>;
|
||||
|
|
@ -93,11 +93,11 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
/delete-node/ mmu@fd950000;
|
||||
/delete-node/ mmu@fd960000;
|
||||
/delete-node/ mmu@fd970000;
|
||||
/delete-node/ mmu@febe0000;
|
||||
/delete-node/ mmu@fe980000;
|
||||
/delete-node/ iommu@fd950000;
|
||||
/delete-node/ iommu@fd960000;
|
||||
/delete-node/ iommu@fd970000;
|
||||
/delete-node/ iommu@febe0000;
|
||||
/delete-node/ iommu@fe980000;
|
||||
|
||||
xhci1: usb@ee040000 {
|
||||
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
|
||||
|
|
|
|||
|
|
@ -1073,7 +1073,7 @@
|
|||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -1081,7 +1081,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -1089,7 +1089,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -1097,7 +1097,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ir: mmu@ff8b0000 {
|
||||
ipmmu_ir: iommu@ff8b0000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xff8b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 3>;
|
||||
|
|
@ -1105,7 +1105,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -1114,7 +1114,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp0: mmu@ec670000 {
|
||||
ipmmu_mp0: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -1122,7 +1122,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -1130,7 +1130,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv1: mmu@fd950000 {
|
||||
ipmmu_pv1: iommu@fd950000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfd950000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 7>;
|
||||
|
|
@ -1138,7 +1138,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv2: mmu@fd960000 {
|
||||
ipmmu_pv2: iommu@fd960000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfd960000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 8>;
|
||||
|
|
@ -1146,7 +1146,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv3: mmu@fd970000 {
|
||||
ipmmu_pv3: iommu@fd970000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfd970000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 9>;
|
||||
|
|
@ -1154,7 +1154,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 10>;
|
||||
|
|
@ -1162,7 +1162,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||
|
|
@ -1170,7 +1170,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc1: mmu@fe6f0000 {
|
||||
ipmmu_vc1: iommu@fe6f0000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfe6f0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 13>;
|
||||
|
|
@ -1178,7 +1178,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 14>;
|
||||
|
|
@ -1186,7 +1186,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi1: mmu@febe0000 {
|
||||
ipmmu_vi1: iommu@febe0000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfebe0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 15>;
|
||||
|
|
@ -1194,7 +1194,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vp0: mmu@fe990000 {
|
||||
ipmmu_vp0: iommu@fe990000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfe990000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 16>;
|
||||
|
|
@ -1202,7 +1202,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vp1: mmu@fe980000 {
|
||||
ipmmu_vp1: iommu@fe980000 {
|
||||
compatible = "renesas,ipmmu-r8a7795";
|
||||
reg = <0 0xfe980000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 17>;
|
||||
|
|
|
|||
|
|
@ -997,7 +997,7 @@
|
|||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -1005,7 +1005,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -1013,7 +1013,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -1021,7 +1021,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ir: mmu@ff8b0000 {
|
||||
ipmmu_ir: iommu@ff8b0000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xff8b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 3>;
|
||||
|
|
@ -1029,7 +1029,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -1038,7 +1038,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec670000 {
|
||||
ipmmu_mp: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -1046,7 +1046,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 5>;
|
||||
|
|
@ -1054,7 +1054,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv1: mmu@fd950000 {
|
||||
ipmmu_pv1: iommu@fd950000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xfd950000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -1062,7 +1062,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 7>;
|
||||
|
|
@ -1070,7 +1070,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 8>;
|
||||
|
|
@ -1078,7 +1078,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a7796";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 9>;
|
||||
|
|
|
|||
|
|
@ -626,21 +626,150 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif0: serial@e6540000 {
|
||||
compatible = "renesas,hscif-r8a77961",
|
||||
"renesas,rcar-gen3-hscif",
|
||||
"renesas,hscif";
|
||||
reg = <0 0xe6540000 0 0x60>;
|
||||
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 520>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
|
||||
<&dmac2 0x31>, <&dmac2 0x30>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 520>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif1: serial@e6550000 {
|
||||
compatible = "renesas,hscif-r8a77961",
|
||||
"renesas,rcar-gen3-hscif",
|
||||
"renesas,hscif";
|
||||
reg = <0 0xe6550000 0 0x60>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 519>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x33>, <&dmac1 0x32>,
|
||||
<&dmac2 0x33>, <&dmac2 0x32>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 519>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif2: serial@e6560000 {
|
||||
compatible = "renesas,hscif-r8a77961",
|
||||
"renesas,rcar-gen3-hscif",
|
||||
"renesas,hscif";
|
||||
reg = <0 0xe6560000 0 0x60>;
|
||||
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 518>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
|
||||
<&dmac2 0x35>, <&dmac2 0x34>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 518>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif3: serial@e66a0000 {
|
||||
compatible = "renesas,hscif-r8a77961",
|
||||
"renesas,rcar-gen3-hscif",
|
||||
"renesas,hscif";
|
||||
reg = <0 0xe66a0000 0 0x60>;
|
||||
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 517>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 517>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif4: serial@e66b0000 {
|
||||
compatible = "renesas,hscif-r8a77961",
|
||||
"renesas,rcar-gen3-hscif",
|
||||
"renesas,hscif";
|
||||
reg = <0 0xe66b0000 0 0x60>;
|
||||
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 516>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x39>, <&dmac0 0x38>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 516>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsusb: usb@e6590000 {
|
||||
compatible = "renesas,usbhs-r8a77961",
|
||||
"renesas,rcar-gen3-usbhs";
|
||||
reg = <0 0xe6590000 0 0x200>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
|
||||
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0 3>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>, <&cpg 703>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_dmac0: dma-controller@e65a0000 {
|
||||
compatible = "renesas,r8a77961-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 330>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <2>;
|
||||
};
|
||||
|
||||
usb_dmac1: dma-controller@e65b0000 {
|
||||
compatible = "renesas,r8a77961-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 331>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <2>;
|
||||
};
|
||||
|
||||
usb3_phy0: usb-phy@e65ee000 {
|
||||
compatible = "renesas,r8a77961-usb3-phy",
|
||||
"renesas,rcar-gen3-usb3-phy";
|
||||
reg = <0 0xe65ee000 0 0x90>;
|
||||
clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
|
||||
<&usb_extal_clk>;
|
||||
clock-names = "usb3-if", "usb3s_clk", "usb_extal";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 328>;
|
||||
#phy-cells = <0>;
|
||||
/* placeholder */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
arm_cc630p: crypto@e6601000 {
|
||||
|
|
@ -799,15 +928,108 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm0: pwm@e6e30000 {
|
||||
compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e30000 0 8>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
resets = <&cpg 523>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm1: pwm@e6e31000 {
|
||||
compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e31000 0 8>;
|
||||
#pwm-cells = <2>;
|
||||
/* placeholder */
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
resets = <&cpg 523>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm2: pwm@e6e32000 {
|
||||
compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e32000 0 8>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
resets = <&cpg 523>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm3: pwm@e6e33000 {
|
||||
compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e33000 0 8>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
resets = <&cpg 523>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm4: pwm@e6e34000 {
|
||||
compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e34000 0 8>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
resets = <&cpg 523>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm5: pwm@e6e35000 {
|
||||
compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e35000 0 8>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
resets = <&cpg 523>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm6: pwm@e6e36000 {
|
||||
compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
|
||||
reg = <0 0xe6e36000 0 8>;
|
||||
#pwm-cells = <2>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
resets = <&cpg 523>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif0: serial@e6e60000 {
|
||||
compatible = "renesas,scif-r8a77961",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6e60000 0 64>;
|
||||
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 207>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
|
||||
<&dmac2 0x51>, <&dmac2 0x50>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 207>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif1: serial@e6e68000 {
|
||||
compatible = "renesas,scif-r8a77961",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6e68000 0 64>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 206>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
|
||||
<&dmac2 0x53>, <&dmac2 0x52>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 206>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif2: serial@e6e88000 {
|
||||
|
|
@ -819,11 +1041,63 @@
|
|||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x13>, <&dmac1 0x12>,
|
||||
<&dmac2 0x13>, <&dmac2 0x12>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 310>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif3: serial@e6c50000 {
|
||||
compatible = "renesas,scif-r8a77961",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6c50000 0 64>;
|
||||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 204>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 204>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif4: serial@e6c40000 {
|
||||
compatible = "renesas,scif-r8a77961",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6c40000 0 64>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 203>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 203>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
scif5: serial@e6f30000 {
|
||||
compatible = "renesas,scif-r8a77961",
|
||||
"renesas,rcar-gen3-scif", "renesas,scif";
|
||||
reg = <0 0xe6f30000 0 64>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 202>,
|
||||
<&cpg CPG_CORE R8A77961_CLK_S3D1>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
|
||||
<&dmac2 0x5b>, <&dmac2 0x5a>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 202>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vin0: video@e6ef0000 {
|
||||
reg = <0 0xe6ef0000 0 0x1000>;
|
||||
/* placeholder */
|
||||
|
|
@ -889,43 +1163,98 @@
|
|||
};
|
||||
|
||||
xhci0: usb@ee000000 {
|
||||
compatible = "renesas,xhci-r8a77961",
|
||||
"renesas,rcar-gen3-xhci";
|
||||
reg = <0 0xee000000 0 0xc00>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 328>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3_peri0: usb@ee020000 {
|
||||
compatible = "renesas,r8a77961-usb3-peri",
|
||||
"renesas,rcar-gen3-usb3-peri";
|
||||
reg = <0 0xee020000 0 0x400>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 328>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci0: usb@ee080000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = <0 0xee080000 0 0x100>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci1: usb@ee0a0000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = <0 0xee0a0000 0 0x100>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1 1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci0: usb@ee080100 {
|
||||
compatible = "generic-ehci";
|
||||
reg = <0 0xee080100 0 0x100>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
phys = <&usb2_phy0 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci0>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci1: usb@ee0a0100 {
|
||||
compatible = "generic-ehci";
|
||||
reg = <0 0xee0a0100 0 0x100>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
phys = <&usb2_phy1 2>;
|
||||
phy-names = "usb";
|
||||
companion = <&ohci1>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb2_phy0: usb-phy@ee080200 {
|
||||
compatible = "renesas,usb2-phy-r8a77961",
|
||||
"renesas,rcar-gen3-usb2-phy";
|
||||
reg = <0 0xee080200 0 0x700>;
|
||||
/* placeholder */
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>, <&cpg 704>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb2_phy1: usb-phy@ee0a0200 {
|
||||
compatible = "renesas,usb2-phy-r8a77961",
|
||||
"renesas,rcar-gen3-usb2-phy";
|
||||
reg = <0 0xee0a0200 0 0x700>;
|
||||
/* placeholder */
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhi0: sd@ee100000 {
|
||||
|
|
@ -994,13 +1323,57 @@
|
|||
};
|
||||
|
||||
pciec0: pcie@fe000000 {
|
||||
compatible = "renesas,pcie-r8a77961",
|
||||
"renesas,pcie-rcar-gen3";
|
||||
reg = <0 0xfe000000 0 0x80000>;
|
||||
/* placeholder */
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
|
||||
clock-names = "pcie", "pcie_bus";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 319>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pciec1: pcie@ee800000 {
|
||||
compatible = "renesas,pcie-r8a77961",
|
||||
"renesas,pcie-rcar-gen3";
|
||||
reg = <0 0xee800000 0 0x80000>;
|
||||
/* placeholder */
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
|
||||
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
|
||||
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
|
||||
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
|
||||
clock-names = "pcie", "pcie_bus";
|
||||
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 318>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
csi20: csi2@fea80000 {
|
||||
|
|
|
|||
|
|
@ -867,7 +867,7 @@
|
|||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -875,7 +875,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -883,7 +883,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -891,7 +891,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -900,7 +900,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec670000 {
|
||||
ipmmu_mp: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -908,7 +908,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -916,7 +916,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 10>;
|
||||
|
|
@ -924,7 +924,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||
|
|
@ -932,7 +932,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 14>;
|
||||
|
|
@ -940,7 +940,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vp0: mmu@fe990000 {
|
||||
ipmmu_vp0: iommu@fe990000 {
|
||||
compatible = "renesas,ipmmu-r8a77965";
|
||||
reg = <0 0xfe990000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 16>;
|
||||
|
|
|
|||
|
|
@ -985,7 +985,7 @@
|
|||
<&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a77970";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -993,7 +993,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ir: mmu@ff8b0000 {
|
||||
ipmmu_ir: iommu@ff8b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77970";
|
||||
reg = <0 0xff8b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 3>;
|
||||
|
|
@ -1001,7 +1001,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77970";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -1010,7 +1010,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a77970";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 7>;
|
||||
|
|
@ -1018,7 +1018,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a77970";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 9>;
|
||||
|
|
|
|||
|
|
@ -1266,7 +1266,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -1274,7 +1274,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ir: mmu@ff8b0000 {
|
||||
ipmmu_ir: iommu@ff8b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xff8b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 3>;
|
||||
|
|
@ -1282,7 +1282,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -1291,7 +1291,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 10>;
|
||||
|
|
@ -1299,7 +1299,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe990000 {
|
||||
ipmmu_vc0: iommu@fe990000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xfe990000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||
|
|
@ -1307,7 +1307,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 14>;
|
||||
|
|
@ -1315,14 +1315,14 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vip0: mmu@e7b00000 {
|
||||
ipmmu_vip0: iommu@e7b00000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xe7b00000 0 0x1000>;
|
||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vip1: mmu@e7960000 {
|
||||
ipmmu_vip1: iommu@e7960000 {
|
||||
compatible = "renesas,ipmmu-r8a77980";
|
||||
reg = <0 0xe7960000 0 0x1000>;
|
||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||
|
|
|
|||
|
|
@ -817,7 +817,7 @@
|
|||
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -825,7 +825,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -833,7 +833,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -841,7 +841,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -850,7 +850,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec670000 {
|
||||
ipmmu_mp: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -858,7 +858,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -866,7 +866,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 10>;
|
||||
|
|
@ -874,7 +874,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||
|
|
@ -882,7 +882,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 14>;
|
||||
|
|
@ -890,7 +890,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vp0: mmu@fe990000 {
|
||||
ipmmu_vp0: iommu@fe990000 {
|
||||
compatible = "renesas,ipmmu-r8a77990";
|
||||
reg = <0 0xfe990000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 16>;
|
||||
|
|
|
|||
|
|
@ -507,7 +507,7 @@
|
|||
<&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
|
||||
};
|
||||
|
||||
ipmmu_ds0: mmu@e6740000 {
|
||||
ipmmu_ds0: iommu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 0>;
|
||||
|
|
@ -515,7 +515,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_ds1: mmu@e7740000 {
|
||||
ipmmu_ds1: iommu@e7740000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xe7740000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 1>;
|
||||
|
|
@ -523,7 +523,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_hc: mmu@e6570000 {
|
||||
ipmmu_hc: iommu@e6570000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xe6570000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 2>;
|
||||
|
|
@ -531,7 +531,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mm: mmu@e67b0000 {
|
||||
ipmmu_mm: iommu@e67b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xe67b0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -540,7 +540,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_mp: mmu@ec670000 {
|
||||
ipmmu_mp: iommu@ec670000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xec670000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 4>;
|
||||
|
|
@ -548,7 +548,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_pv0: mmu@fd800000 {
|
||||
ipmmu_pv0: iommu@fd800000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xfd800000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 6>;
|
||||
|
|
@ -556,7 +556,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
ipmmu_rt: iommu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 10>;
|
||||
|
|
@ -564,7 +564,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vc0: mmu@fe6b0000 {
|
||||
ipmmu_vc0: iommu@fe6b0000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xfe6b0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||
|
|
@ -572,7 +572,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vi0: mmu@febd0000 {
|
||||
ipmmu_vi0: iommu@febd0000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xfebd0000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 14>;
|
||||
|
|
@ -580,7 +580,7 @@
|
|||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
ipmmu_vp0: mmu@fe990000 {
|
||||
ipmmu_vp0: iommu@fe990000 {
|
||||
compatible = "renesas,ipmmu-r8a77995";
|
||||
reg = <0 0xfe990000 0 0x1000>;
|
||||
renesas,ipmmu-main = <&ipmmu_mm 16>;
|
||||
|
|
|
|||
Loading…
Reference in New Issue