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arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function 

We found out that we are unable to control the PERST# signal via the
default pin dedicated to be PERST# pin (GPIO2[3] pin) on A3700 SOC when
this pin is in EP_PCIE1_Resetn mode. There is a register in the PCIe
register space called PERSTN_GPIO_EN (D0088004[3]), but changing the
value of this register does not change the pin output when measuring
with voltmeter.

We do not know if this is a bug in the SOC, or if it works only when
PCIe controller is in a certain state.

Commit f4c7d053d7 ("PCI: aardvark: Wait for endpoint to be ready
before training link") says that when this pin changes pinctrl mode
from EP_PCIE1_Resetn to GPIO, the PERST# signal is asserted for a brief
moment.

So currently the situation is that on A3700 boards the PERST# signal is
asserted in U-Boot (because the code in U-Boot issues reset via this pin
via GPIO mode), and then in Linux by the obscure and undocumented
mechanism described by the above mentioned commit.

We want to issue PERST# signal in a known way, therefore this patch
changes the pcie_reset_pin function from "pcie" to "gpio" and adds the
reset-gpios property to the PCIe node in device tree files of
EspressoBin and Armada 3720 Dev Board (Turris Mox device tree already
has this property and uDPU does not have a PCIe port).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Remi Pommarel <repk@triplefau.lt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Marek Behún 2020-04-30 10:06:23 +02:00 committed by Gregory CLEMENT
parent 847c3323d5
commit 7158780169
4 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm64/boot/dts/marvell/armada-3720-db.dts
View File

@ -128,6 +128,9 @@
/* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
status = "okay";
};

1
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
View File

@ -47,6 +47,7 @@
phys = <&comphy1 0>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
};
/* J6 */

4
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
View File

@ -128,10 +128,6 @@
};
};
&pcie_reset_pins {
function = "gpio";
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;

2
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
View File

@ -317,7 +317,7 @@
pcie_reset_pins: pcie-reset-pins {
groups = "pcie1";
function = "pcie";
function = "gpio";
};
pcie_clkreq_pins: pcie-clkreq-pins {