i2c: designware-pci: Add support for Elkhart Lake PSE I2C

Add support for Intel(R) Programmable Services Engine (Intel(R) PSE) I2C
controller in Intel Elkhart Lake when interface is assigned to the host
processor.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Jarkko Nikula 2019-08-15 17:29:44 +03:00 committed by Wolfram Sang
parent 21aa3983d6
commit 70fb95e213
1 changed files with 18 additions and 0 deletions

View File

@ -33,6 +33,7 @@ enum dw_pci_ctl_id_t {
baytrail,
cherrytrail,
haswell,
elkhartlake,
};
struct dw_scl_sda_cfg {
@ -168,6 +169,14 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.flags = MODEL_CHERRYTRAIL,
.scl_sda_cfg = &byt_config,
},
[elkhartlake] = {
.bus_num = -1,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
.tx_fifo_depth = 32,
.rx_fifo_depth = 32,
.functionality = I2C_FUNC_10BIT_ADDR,
.clk_khz = 100000,
},
};
#ifdef CONFIG_PM
@ -340,6 +349,15 @@ static const struct pci_device_id i2_designware_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
{ PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
{ PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
/* Elkhart Lake (PSE I2C) */
{ PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake },
{ PCI_VDEVICE(INTEL, 0x4bba), elkhartlake },
{ PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake },
{ PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake },
{ PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake },
{ PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake },
{ PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake },
{ PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake },
{ 0,}
};
MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);