powerpc fixes for 4.7 #5
- tm: Always reclaim in start_thread() for exec() class syscalls from Cyril Bur - tm: Avoid SLB faults in treclaim/trecheckpoint when RI=0 from Michael Neuling - eeh: Fix wrong argument passed to eeh_rmv_device() from Gavin Shan - Initialise pci_io_base as early as possible from Darren Stevens -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXeEmsAAoJEFHr6jzI4aWAwMMQAKs/u9rwB3gpOkNJSHajN1Dd kdqDufzLxLDwbWnMfqM1+bcO2EOjPhKbtpbzhG6oeiET8undRRoLsjHS5rZeYK5h cviRPEJ/Yz8ZWaIgFGI8+02gXwU0MJhuTY8NPexXmsh4FRdKYwEuCIJShl30lg22 P7UrJ2SCNM+H/uZyS07B7thiwBeAKSp6VkLTpuW/QDz2j1ra/F22dTh7c0Agdahd INAMAnh9nYeuMVYn4XjOOlQ07JnBTuf1/W5Wxlw4i/86rVq+Hy8zh5r1X52oysR5 lZl63B9q3agKG9cc9lSN2ibTDVerlFMwB2QysX2a6Uy7+y2SB3hS7VS1RTXCh3hg /omApGGVW3Hh+E2CuKfFLQySU55NRpLAoTGravGr/KsH4wZP/n/fkrctldCrqm7P sTPT52+t+iJQk4fiskRY3yQ7DTTnt3rTC8MJRGqvLuCheolLll4NQaWOF75AJP+7 WFWtC4QHOTPERMkhqLnZDG2vNuDg1H8chuZ2+PxtIs6G1vuOEun+MTZAYh4u6XWE bAIT9rV3xBdE17bzYOQz7lU1y7yNVtP7xkm0HIOAHlU4gUrjQp5u8F3TnPW3/M0m 8GeaZdrPjhsaNg31YZODAeM8Ddf+N9d2a2VPIr/fzytURhMe0ss3Z/MdMoYRATab Lh1o+G3gDo9MVaphoJ3w =oEAY -----END PGP SIGNATURE----- Merge tag 'powerpc-4.7-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - tm: Always reclaim in start_thread() for exec() class syscalls from Cyril Bur - tm: Avoid SLB faults in treclaim/trecheckpoint when RI=0 from Michael Neuling - eeh: Fix wrong argument passed to eeh_rmv_device() from Gavin Shan - Initialise pci_io_base as early as possible from Darren Stevens * tag 'powerpc-4.7-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc: Initialise pci_io_base as early as possible powerpc/tm: Avoid SLB faults in treclaim/trecheckpoint when RI=0 powerpc/eeh: Fix wrong argument passed to eeh_rmv_device() powerpc/tm: Always reclaim in start_thread() for exec() class syscalls
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commit
70bd68d7f7
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@ -230,6 +230,7 @@ extern unsigned long __kernel_virt_size;
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#define KERN_VIRT_SIZE __kernel_virt_size
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#define KERN_VIRT_SIZE __kernel_virt_size
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extern struct page *vmemmap;
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extern struct page *vmemmap;
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extern unsigned long ioremap_bot;
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extern unsigned long ioremap_bot;
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extern unsigned long pci_io_base;
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#include <asm/book3s/64/hash.h>
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#include <asm/book3s/64/hash.h>
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@ -647,7 +647,7 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,
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pci_unlock_rescan_remove();
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pci_unlock_rescan_remove();
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}
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}
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} else if (frozen_bus) {
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} else if (frozen_bus) {
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eeh_pe_dev_traverse(pe, eeh_rmv_device, &rmv_data);
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eeh_pe_dev_traverse(pe, eeh_rmv_device, rmv_data);
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}
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}
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/*
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/*
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@ -47,7 +47,6 @@ static int __init pcibios_init(void)
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printk(KERN_INFO "PCI: Probing PCI hardware\n");
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printk(KERN_INFO "PCI: Probing PCI hardware\n");
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pci_io_base = ISA_IO_BASE;
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/* For now, override phys_mem_access_prot. If we need it,g
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/* For now, override phys_mem_access_prot. If we need it,g
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* later, we may move that initialization to each ppc_md
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* later, we may move that initialization to each ppc_md
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*/
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*/
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@ -1505,6 +1505,16 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
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current->thread.regs = regs - 1;
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current->thread.regs = regs - 1;
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}
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}
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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/*
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* Clear any transactional state, we're exec()ing. The cause is
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* not important as there will never be a recheckpoint so it's not
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* user visible.
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*/
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if (MSR_TM_SUSPENDED(mfmsr()))
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tm_reclaim_current(0);
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#endif
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memset(regs->gpr, 0, sizeof(regs->gpr));
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memset(regs->gpr, 0, sizeof(regs->gpr));
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regs->ctr = 0;
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regs->ctr = 0;
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regs->link = 0;
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regs->link = 0;
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@ -110,17 +110,11 @@ _GLOBAL(tm_reclaim)
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std r3, STK_PARAM(R3)(r1)
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std r3, STK_PARAM(R3)(r1)
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SAVE_NVGPRS(r1)
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SAVE_NVGPRS(r1)
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/* We need to setup MSR for VSX register save instructions. Here we
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/* We need to setup MSR for VSX register save instructions. */
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* also clear the MSR RI since when we do the treclaim, we won't have a
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* valid kernel pointer for a while. We clear RI here as it avoids
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* adding another mtmsr closer to the treclaim. This makes the region
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* maked as non-recoverable wider than it needs to be but it saves on
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* inserting another mtmsrd later.
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*/
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mfmsr r14
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mfmsr r14
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mr r15, r14
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mr r15, r14
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ori r15, r15, MSR_FP
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ori r15, r15, MSR_FP
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li r16, MSR_RI
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li r16, 0
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ori r16, r16, MSR_EE /* IRQs hard off */
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ori r16, r16, MSR_EE /* IRQs hard off */
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andc r15, r15, r16
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andc r15, r15, r16
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oris r15, r15, MSR_VEC@h
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oris r15, r15, MSR_VEC@h
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@ -176,7 +170,17 @@ dont_backup_fp:
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1: tdeqi r6, 0
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1: tdeqi r6, 0
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EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0
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EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0
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/* The moment we treclaim, ALL of our GPRs will switch
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/* Clear MSR RI since we are about to change r1, EE is already off. */
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li r4, 0
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mtmsrd r4, 1
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/*
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* BE CAREFUL HERE:
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* At this point we can't take an SLB miss since we have MSR_RI
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* off. Load only to/from the stack/paca which are in SLB bolted regions
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* until we turn MSR RI back on.
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*
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* The moment we treclaim, ALL of our GPRs will switch
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* to user register state. (FPRs, CCR etc. also!)
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* to user register state. (FPRs, CCR etc. also!)
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* Use an sprg and a tm_scratch in the PACA to shuffle.
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* Use an sprg and a tm_scratch in the PACA to shuffle.
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*/
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*/
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@ -197,6 +201,11 @@ dont_backup_fp:
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/* Store the PPR in r11 and reset to decent value */
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/* Store the PPR in r11 and reset to decent value */
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std r11, GPR11(r1) /* Temporary stash */
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std r11, GPR11(r1) /* Temporary stash */
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/* Reset MSR RI so we can take SLB faults again */
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li r11, MSR_RI
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mtmsrd r11, 1
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mfspr r11, SPRN_PPR
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mfspr r11, SPRN_PPR
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HMT_MEDIUM
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HMT_MEDIUM
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@ -397,11 +406,6 @@ restore_gprs:
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ld r5, THREAD_TM_DSCR(r3)
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ld r5, THREAD_TM_DSCR(r3)
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ld r6, THREAD_TM_PPR(r3)
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ld r6, THREAD_TM_PPR(r3)
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/* Clear the MSR RI since we are about to change R1. EE is already off
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*/
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li r4, 0
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mtmsrd r4, 1
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REST_GPR(0, r7) /* GPR0 */
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REST_GPR(0, r7) /* GPR0 */
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REST_2GPRS(2, r7) /* GPR2-3 */
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REST_2GPRS(2, r7) /* GPR2-3 */
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REST_GPR(4, r7) /* GPR4 */
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REST_GPR(4, r7) /* GPR4 */
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@ -439,10 +443,33 @@ restore_gprs:
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ld r6, _CCR(r7)
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ld r6, _CCR(r7)
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mtcr r6
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mtcr r6
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REST_GPR(1, r7) /* GPR1 */
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REST_GPR(5, r7) /* GPR5-7 */
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REST_GPR(6, r7)
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REST_GPR(6, r7)
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ld r7, GPR7(r7)
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/*
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* Store r1 and r5 on the stack so that we can access them
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* after we clear MSR RI.
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*/
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REST_GPR(5, r7)
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std r5, -8(r1)
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ld r5, GPR1(r7)
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std r5, -16(r1)
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REST_GPR(7, r7)
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/* Clear MSR RI since we are about to change r1. EE is already off */
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li r5, 0
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mtmsrd r5, 1
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/*
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* BE CAREFUL HERE:
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* At this point we can't take an SLB miss since we have MSR_RI
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* off. Load only to/from the stack/paca which are in SLB bolted regions
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* until we turn MSR RI back on.
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*/
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ld r5, -8(r1)
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ld r1, -16(r1)
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/* Commit register state as checkpointed state: */
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/* Commit register state as checkpointed state: */
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TRECHKPT
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TRECHKPT
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@ -922,6 +922,10 @@ void __init hash__early_init_mmu(void)
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vmemmap = (struct page *)H_VMEMMAP_BASE;
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vmemmap = (struct page *)H_VMEMMAP_BASE;
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ioremap_bot = IOREMAP_BASE;
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ioremap_bot = IOREMAP_BASE;
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#ifdef CONFIG_PCI
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pci_io_base = ISA_IO_BASE;
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#endif
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/* Initialize the MMU Hash table and create the linear mapping
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/* Initialize the MMU Hash table and create the linear mapping
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* of memory. Has to be done before SLB initialization as this is
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* of memory. Has to be done before SLB initialization as this is
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* currently where the page size encoding is obtained.
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* currently where the page size encoding is obtained.
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@ -328,6 +328,11 @@ void __init radix__early_init_mmu(void)
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__vmalloc_end = RADIX_VMALLOC_END;
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__vmalloc_end = RADIX_VMALLOC_END;
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vmemmap = (struct page *)RADIX_VMEMMAP_BASE;
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vmemmap = (struct page *)RADIX_VMEMMAP_BASE;
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ioremap_bot = IOREMAP_BASE;
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ioremap_bot = IOREMAP_BASE;
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#ifdef CONFIG_PCI
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pci_io_base = ISA_IO_BASE;
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#endif
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/*
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/*
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* For now radix also use the same frag size
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* For now radix also use the same frag size
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*/
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*/
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