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MIPS: Watch: Avoid duplication of bits in mips_read_watch_registers 

Currently the bits to be masked when watchhi is read is defined inline
for each register. To avoid this, define the bits once and mask each
register with that value.

Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Acked-by: David Daney <david.daney@cavium.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18158/
Signed-off-by: James Hogan <jhogan@kernel.org>
This commit is contained in:
Matt Redfearn 2018-01-02 11:31:22 +00:00 committed by James Hogan
parent f609cc3a20
commit 705e71ad70
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GPG Key ID: 6C0B6993DE38767A
1 changed files with 6 additions and 8 deletions
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14
arch/mips/kernel/watch.c
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@ -48,21 +48,19 @@ void mips_read_watch_registers(void)
{ {
struct mips3264_watch_reg_state *watches = struct mips3264_watch_reg_state *watches =
&current->thread.watch.mips3264; &current->thread.watch.mips3264;
unsigned int watchhi_mask = MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW;
switch (current_cpu_data.watch_reg_use_cnt) { switch (current_cpu_data.watch_reg_use_cnt) {
default: default:
BUG(); BUG();
case 4: case 4:
watches->watchhi[3] = (read_c0_watchhi3() & watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask);
(MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
case 3: case 3:
watches->watchhi[2] = (read_c0_watchhi2() & watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask);
(MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
case 2: case 2:
watches->watchhi[1] = (read_c0_watchhi1() & watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask);
(MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
case 1: case 1:
watches->watchhi[0] = (read_c0_watchhi0() & watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask);
(MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW));
} }
if (current_cpu_data.watch_reg_use_cnt == 1 && if (current_cpu_data.watch_reg_use_cnt == 1 &&
(watches->watchhi[0] & MIPS_WATCHHI_IRW) == 0) { (watches->watchhi[0] & MIPS_WATCHHI_IRW) == 0) {