[media] adv7604: Add endpoint properties to DT bindings
Add support for the hsync-active, vsync-active and pclk-sample properties to the DT bindings and control BT.656 mode implicitly. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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@ -33,6 +33,19 @@ Optional Properties:
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- reset-gpios: Reference to the GPIO connected to the device's reset pin.
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- reset-gpios: Reference to the GPIO connected to the device's reset pin.
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Optional Endpoint Properties:
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The following three properties are defined in video-interfaces.txt and are
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valid for source endpoints only.
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- hsync-active: Horizontal synchronization polarity. Defaults to active low.
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- vsync-active: Vertical synchronization polarity. Defaults to active low.
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- pclk-sample: Pixel clock polarity. Defaults to output on the falling edge.
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If none of hsync-active, vsync-active and pclk-sample is specified the
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endpoint will use embedded BT.656 synchronization.
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Example:
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Example:
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hdmi_receiver@4c {
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hdmi_receiver@4c {
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@ -41,6 +41,7 @@
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-dv-timings.h>
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#include <media/v4l2-dv-timings.h>
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#include <media/v4l2-of.h>
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static int debug;
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static int debug;
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module_param(debug, int, 0644);
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module_param(debug, int, 0644);
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@ -2678,6 +2679,37 @@ MODULE_DEVICE_TABLE(of, adv7604_of_id);
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static int adv7604_parse_dt(struct adv7604_state *state)
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static int adv7604_parse_dt(struct adv7604_state *state)
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{
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{
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struct v4l2_of_endpoint bus_cfg;
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struct device_node *endpoint;
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struct device_node *np;
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unsigned int flags;
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np = state->i2c_clients[ADV7604_PAGE_IO]->dev.of_node;
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/* Parse the endpoint. */
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endpoint = of_graph_get_next_endpoint(np, NULL);
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if (!endpoint)
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return -EINVAL;
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v4l2_of_parse_endpoint(endpoint, &bus_cfg);
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of_node_put(endpoint);
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flags = bus_cfg.bus.parallel.flags;
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if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
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state->pdata.inv_hs_pol = 1;
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if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
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state->pdata.inv_vs_pol = 1;
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if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
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state->pdata.inv_llc_pol = 1;
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if (bus_cfg.bus_type == V4L2_MBUS_BT656) {
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state->pdata.insert_av_codes = 1;
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state->pdata.op_656_range = 1;
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}
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/* Disable the interrupt for now as no DT-based board uses it. */
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/* Disable the interrupt for now as no DT-based board uses it. */
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state->pdata.int1_config = ADV7604_INT1_CONFIG_DISABLED;
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state->pdata.int1_config = ADV7604_INT1_CONFIG_DISABLED;
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@ -2700,9 +2732,7 @@ static int adv7604_parse_dt(struct adv7604_state *state)
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state->pdata.disable_cable_det_rst = 0;
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state->pdata.disable_cable_det_rst = 0;
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state->pdata.default_input = -1;
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state->pdata.default_input = -1;
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state->pdata.blank_data = 1;
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state->pdata.blank_data = 1;
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state->pdata.op_656_range = 1;
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state->pdata.alt_data_sat = 1;
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state->pdata.alt_data_sat = 1;
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state->pdata.insert_av_codes = 1;
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state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0;
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state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0;
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state->pdata.bus_order = ADV7604_BUS_ORDER_RGB;
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state->pdata.bus_order = ADV7604_BUS_ORDER_RGB;
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